Merge branch 'master' into L2SDP-846

applications/lofar2/designs/lofar2_unb2b_ring/tb/vhdl/tb_tb_lofar2_unb2b_ring.vhd

@@ -39,8 +39,8 @@ END tb_tb_lofar2_unb2b_ring;
 ARCHITECTURE tb OF tb_tb_lofar2_unb2b_ring IS
   CONSTANT c_nof_rn   : NATURAL := 3;
   CONSTANT c_nof_tb   : NATURAL := 5;
-  SIGNAL   tb_end     : STD_LOGIC_VECTOR(c_nof_tb-1 DOWNTO 0) := (OTHERS => '0');  -- declare tb_end to avoid 'No objects found' error on 'when -label tb_end'
-  SIGNAL   tb_end_and : STD_LOGIC;
+  SIGNAL   tb_end_vec : STD_LOGIC_VECTOR(c_nof_tb-1 DOWNTO 0) := (OTHERS => '0');  
+  SIGNAL   tb_end     : STD_LOGIC;  -- declare tb_end as STD_LOGIC to avoid 'No objects found' error on 'when -label tb_end' in *.do file
 BEGIN
 
 --    g_multi_tb            : BOOLEAN              := FALSE;
@@ -51,15 +51,15 @@ BEGIN
 --    g_access_scheme       : INTEGER RANGE 1 TO 3 := 2
 
 -- using different g_unb_nr to avoid MM file clashing.
-  u_one_1    : ENTITY work.tb_lofar2_unb2b_ring GENERIC MAP(TRUE, 0, "lofar2_unb2b_ring_one",  c_nof_rn,  3, 1) PORT MAP(tb_end(0)); -- access scheme 1.
-  u_one_2_3  : ENTITY work.tb_lofar2_unb2b_ring GENERIC MAP(TRUE, 1, "lofar2_unb2b_ring_one",  c_nof_rn,  3, 2) PORT MAP(tb_end(1)); -- access scheme 2/3. Tb for access scheme 2 is same tb for 3
-  u_full_1   : ENTITY work.tb_lofar2_unb2b_ring GENERIC MAP(TRUE, 2, "lofar2_unb2b_ring_full", c_nof_rn,  3, 1) PORT MAP(tb_end(2)); -- access scheme 1.
-  u_full_2_3 : ENTITY work.tb_lofar2_unb2b_ring GENERIC MAP(TRUE, 3, "lofar2_unb2b_ring_full", c_nof_rn, 32, 2) PORT MAP(tb_end(3)); -- access scheme 2/3. Tb for access scheme 2 is same tb for 3 
+  u_one_1    : ENTITY work.tb_lofar2_unb2b_ring GENERIC MAP(TRUE, 0, "lofar2_unb2b_ring_one",  c_nof_rn,  3, 1) PORT MAP(tb_end_vec(0)); -- access scheme 1.
+  u_one_2_3  : ENTITY work.tb_lofar2_unb2b_ring GENERIC MAP(TRUE, 1, "lofar2_unb2b_ring_one",  c_nof_rn,  3, 2) PORT MAP(tb_end_vec(1)); -- access scheme 2/3. Tb for access scheme 2 is same tb for 3
+  u_full_1   : ENTITY work.tb_lofar2_unb2b_ring GENERIC MAP(TRUE, 2, "lofar2_unb2b_ring_full", c_nof_rn,  3, 1) PORT MAP(tb_end_vec(2)); -- access scheme 1.
+  u_full_2_3 : ENTITY work.tb_lofar2_unb2b_ring GENERIC MAP(TRUE, 3, "lofar2_unb2b_ring_full", c_nof_rn, 32, 2) PORT MAP(tb_end_vec(3)); -- access scheme 2/3. Tb for access scheme 2 is same tb for 3 
   -- u_16_rn -> Using 16 ring nodes. Using the _one revision as it only uses 1 lane to limit MM readout time. Also using 
   -- g_nof_block_per_sync = 32 as all bsn monitors have to be read during one sync period which takes more time with 16 nodes.
-  u_16_rn    : ENTITY work.tb_lofar2_unb2b_ring GENERIC MAP(TRUE, 4, "lofar2_unb2b_ring_one",        16, 32, 2) PORT MAP(tb_end(4)); 
+  u_16_rn    : ENTITY work.tb_lofar2_unb2b_ring GENERIC MAP(TRUE, 4, "lofar2_unb2b_ring_one",        16, 32, 2) PORT MAP(tb_end_vec(4)); 
 
-  tb_end_and <= vector_and(tb_end);
-  proc_common_stop_simulation(tb_end_and);
+  tb_end <= vector_and(tb_end_vec);
+  proc_common_stop_simulation(tb_end);
 
 END tb;

applications/lofar2/designs/lofar2_unb2c_ring/tb/vhdl/tb_tb_lofar2_unb2c_ring.vhd

@@ -39,8 +39,8 @@ END tb_tb_lofar2_unb2c_ring;
 ARCHITECTURE tb OF tb_tb_lofar2_unb2c_ring IS
   CONSTANT c_nof_rn   : NATURAL := 3;
   CONSTANT c_nof_tb   : NATURAL := 5;
-  SIGNAL   tb_end     : STD_LOGIC_VECTOR(c_nof_tb-1 DOWNTO 0) := (OTHERS => '0');  -- declare tb_end to avoid 'No objects found' error on 'when -label tb_end'
-  SIGNAL   tb_end_and : STD_LOGIC;
+  SIGNAL   tb_end_vec : STD_LOGIC_VECTOR(c_nof_tb-1 DOWNTO 0) := (OTHERS => '0');  
+  SIGNAL   tb_end     : STD_LOGIC;  -- declare tb_end as STD_LOGIC to avoid 'No objects found' error on 'when -label tb_end' in *.do file
 BEGIN
 
 --    g_multi_tb            : BOOLEAN              := FALSE;
@@ -51,15 +51,15 @@ BEGIN
 --    g_access_scheme       : INTEGER RANGE 1 TO 3 := 2
 
 -- using different g_unb_nr to avoid MM file clashing.
-  u_one_1    : ENTITY work.tb_lofar2_unb2c_ring GENERIC MAP(TRUE, 0, "lofar2_unb2c_ring_one",  c_nof_rn,  3, 1) PORT MAP(tb_end(0)); -- access scheme 1.
-  u_one_2_3  : ENTITY work.tb_lofar2_unb2c_ring GENERIC MAP(TRUE, 1, "lofar2_unb2c_ring_one",  c_nof_rn,  3, 2) PORT MAP(tb_end(1)); -- access scheme 2/3. Tb for access scheme 2 is same tb for 3
-  u_full_1   : ENTITY work.tb_lofar2_unb2c_ring GENERIC MAP(TRUE, 2, "lofar2_unb2c_ring_full", c_nof_rn,  3, 1) PORT MAP(tb_end(2)); -- access scheme 1.
-  u_full_2_3 : ENTITY work.tb_lofar2_unb2c_ring GENERIC MAP(TRUE, 3, "lofar2_unb2c_ring_full", c_nof_rn, 32, 2) PORT MAP(tb_end(3)); -- access scheme 2/3. Tb for access scheme 2 is same tb for 3 
+  u_one_1    : ENTITY work.tb_lofar2_unb2c_ring GENERIC MAP(TRUE, 0, "lofar2_unb2c_ring_one",  c_nof_rn,  3, 1) PORT MAP(tb_end_vec(0)); -- access scheme 1.
+  u_one_2_3  : ENTITY work.tb_lofar2_unb2c_ring GENERIC MAP(TRUE, 1, "lofar2_unb2c_ring_one",  c_nof_rn,  3, 2) PORT MAP(tb_end_vec(1)); -- access scheme 2/3. Tb for access scheme 2 is same tb for 3
+  u_full_1   : ENTITY work.tb_lofar2_unb2c_ring GENERIC MAP(TRUE, 2, "lofar2_unb2c_ring_full", c_nof_rn,  3, 1) PORT MAP(tb_end_vec(2)); -- access scheme 1.
+  u_full_2_3 : ENTITY work.tb_lofar2_unb2c_ring GENERIC MAP(TRUE, 3, "lofar2_unb2c_ring_full", c_nof_rn, 32, 2) PORT MAP(tb_end_vec(3)); -- access scheme 2/3. Tb for access scheme 2 is same tb for 3 
   -- u_16_rn -> Using 16 ring nodes. Using the _one revision as it only uses 1 lane to limit MM readout time. Also using 
   -- g_nof_block_per_sync = 32 as all bsn monitors have to be read during one sync period which takes more time with 16 nodes.
-  u_16_rn    : ENTITY work.tb_lofar2_unb2c_ring GENERIC MAP(TRUE, 4, "lofar2_unb2c_ring_one",        16, 32, 2) PORT MAP(tb_end(4)); 
+  u_16_rn    : ENTITY work.tb_lofar2_unb2c_ring GENERIC MAP(TRUE, 4, "lofar2_unb2c_ring_one",        16, 32, 2) PORT MAP(tb_end_vec(4)); 
 
-  tb_end_and <= vector_and(tb_end);
-  proc_common_stop_simulation(tb_end_and);
+  tb_end <= vector_and(tb_end_vec);
+  proc_common_stop_simulation(tb_end);
 
 END tb;