L2SDP-200, some changes.

applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd

@@ -64,29 +64,30 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
   CONSTANT c_ip_src_addr  : STD_LOGIC_VECTOR(c_network_ip_addr_w-1 DOWNTO 0) := x"0A090807";
   CONSTANT c_udp_src_port : STD_LOGIC_VECTOR(c_network_udp_port_w-1 DOWNTO 0) := x"D001";
 
-  -- used mm_adresses on mm bus "enable_mosi/miso"
+  -- Used mm_adresses on mm bus "enable_mosi/miso".
   CONSTANT c_reg_enable_mm_addr_enable : NATURAL := 0;
-  -- used mm_adresses on mm bus "hdr_dat_mosi/miso"
+  
+  -- Used mm_adresses on mm bus "hdr_dat_mosi/miso".
   CONSTANT c_hdr_dat_mm_addr_eth_src_mac  : NATURAL := 1;
   CONSTANT c_hdr_dat_mm_addr_ip_src_addr  : NATURAL := 13;
   CONSTANT c_hdr_dat_mm_addr_udp_src_port : NATURAL := 15;
   
-  -- Define SST RAM structure
+  -- Define SST RAM structure.
   CONSTANT c_nof_data  : NATURAL := 512;
   CONSTANT c_data_size : NATURAL := 2;
   CONSTANT c_step_size : NATURAL := 4;
   
-  -- Define SST RAM size for g_nof_signal_inputs_per_pn
+  -- Define SST RAM size for g_nof_signal_inputs_per_pn.
   CONSTANT c_ram_size  : NATURAL := c_nof_data * c_data_size * g_nof_signal_inputs_per_pn;
   CONSTANT c_ram_w     : NATURAL := ceil_log2(c_ram_size);
   --CONSTANT c_ram_buf   : t_c_mem := (c_mem_ram_rd_latency, c_ram_w,  32, 2**c_ram_w, 'X');
   CONSTANT c_ram_buf   : t_c_mem := (1, c_ram_w,  32, 2**c_ram_w, 'X');
 
-  -- Define block timing
-  CONSTANT c_nof_block_per_sync : NATURAL := 20;  -- sufficient to fit more than g_nof_signal_inputs_per_pn offload packets per sync interval
+  -- Define block timing.
+  CONSTANT c_nof_block_per_sync : NATURAL := 20;  -- Sufficient to fit more than g_nof_signal_inputs_per_pn offload packets per sync interval.
   CONSTANT c_nof_clk_per_block  : NATURAL := c_nof_data * c_data_size;
 
-  -- based on g_statistics_type: 'S'=0x53="SST", 'B'=0x42="BST", 'X'=0x58="XST"
+  -- Based on g_statistics_type: 'S'=0x53="SST", 'B'=0x42="BST", 'X'=0x58="XST".
   CONSTANT c_marker                    : NATURAL := sel_a_b(g_statistics_type="BST", c_sdp_marker_bst,
                                                     sel_a_b(g_statistics_type="XST", c_sdp_marker_xst, 
                                                                                      c_sdp_marker_sst));  -- SST
@@ -100,13 +101,12 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
                                                                                       c_sdp_N_sub));  -- SST
 
   CONSTANT c_nof_valid_per_block : NATURAL := c_nof_data * c_data_size;
-
   CONSTANT c_nof_sync            : NATURAL := 5;
   CONSTANT c_nof_clk_per_sync    : NATURAL := c_nof_block_per_sync * c_nof_clk_per_block;
 
   SIGNAL tb_end : STD_LOGIC := '0';
 
-  SIGNAL dp_clk              : STD_LOGIC := '1';   -- digital data path clock = 200 MHz (deser factor 4);
+  SIGNAL dp_clk : STD_LOGIC := '1';   -- Digital data path clock = 200 MHz (deser factor 4);
   SIGNAL dp_rst : STD_LOGIC;
 
   SIGNAL mm_clk : STD_LOGIC := '1';   -- MM control clock = 50 MHz
@@ -134,7 +134,7 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
   SIGNAL rx_hdr_fields_out   : STD_LOGIC_VECTOR(1023 DOWNTO 0);
   SIGNAL rx_hdr_fields_raw   : STD_LOGIC_VECTOR(1023 DOWNTO 0) := (OTHERS => '0');
 
-  -- signals used to change settings of sdp_info 
+  -- Signals used to change settings of sdp_info. 
   SIGNAL gn_index  : NATURAL := 1;  -- select > 0 to see effect of g_offload_time 
   
   SIGNAL sdp_info  :  t_sdp_info := (
@@ -154,16 +154,15 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
                         x"0000"             -- beamlet_scale
                       );
 
-  -- signals used for starting processes
+  -- Signals used for starting processes.
   SIGNAL ram_wr_data   : STD_LOGIC_VECTOR(c_ram_buf.dat_w-1 DOWNTO 0);
   SIGNAL ram_wr_addr   : STD_LOGIC_VECTOR(c_ram_buf.adr_w-1 DOWNTO 0);
   SIGNAL ram_wr_en     : STD_LOGIC;
   SIGNAL init_ram_done : STD_LOGIC := '0';
 
-  SIGNAL rx_request       : STD_LOGIC := '0';
+  SIGNAL in_sync_hold     : STD_LOGIC := '0';
   SIGNAL rx_prev_bsn      : NATURAL := 0;
   SIGNAL rx_bsn           : NATURAL := 0;
-  SIGNAL rx_data_id       : NATURAL := 0;
   SIGNAL rx_block_cnt     : NATURAL := 0;
   SIGNAL rx_valid_clk_cnt : NATURAL := 0;
 
@@ -174,11 +173,11 @@ BEGIN
   mm_rst <= '1', '0' AFTER c_mm_clk_period*7;
   mm_clk <= (NOT mm_clk) OR tb_end AFTER c_mm_clk_period/2;
 
-  -- fill ram with data, data is same as address number.
+  -- Fill ram with data, data is same as address number.
   p_mm_statistics_ram : PROCESS
   BEGIN
     ram_wr_en <= '0';
-    -- initialyze
+    -- Initialyze
     proc_common_wait_until_low(mm_clk, mm_rst);
     proc_common_wait_some_cycles(mm_clk, 10);
 
@@ -198,7 +197,7 @@ BEGIN
   p_enable_trigger : PROCESS
   BEGIN
     proc_common_wait_until_high(mm_clk, init_ram_done);
-    -- enable common variabel delay
+    -- Enable common variabel delay.
     proc_mem_mm_bus_wr(c_reg_enable_mm_addr_enable, 1, mm_clk, enable_miso, enable_mosi);  
     proc_common_wait_some_cycles(mm_clk, c_cross_clock_domain_latency);
     WAIT;
@@ -238,12 +237,11 @@ BEGIN
     WAIT;
   END PROCESS;
 
-  p_verify_header : PROCESS
+  p_verify_header : PROCESS(test_offload_sosi)
   BEGIN
-    proc_common_wait_until_high(mm_clk, init_ram_done);
-    proc_common_wait_until_high(mm_clk, test_offload_sosi.sop);
+    IF test_offload_sosi.eop = '1' THEN
       -- bsn is not fully received (bit 0-15 is missing) because 32 bit allignment not working in dp_offload_rx.vhd.   
-    -- check fixed settings
+      -- Check fixed settings.
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "eth_dst_mac") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "eth_dst_mac")) = x"00074306C700"
         REPORT "wrong eth_dst_mac" SEVERITY ERROR;
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "eth_type") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "eth_type")) = x"0800"
@@ -275,7 +273,7 @@ BEGIN
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "sdp_version_id") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "sdp_version_id")) = TO_UVEC(5, 8)
         REPORT "wrong sdp_version_id" SEVERITY ERROR;  
       
-    -- check settings set by mm interface in this test bench
+      -- Check settings set by mm interface in this test bench.
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "eth_src_mac") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "eth_src_mac")) = c_eth_src_mac
         REPORT "wrong eth_src_mac" SEVERITY ERROR;    
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "ip_src_addr") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "ip_src_addr")) = c_ip_src_addr
@@ -283,7 +281,7 @@ BEGIN
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "udp_src_port") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "udp_src_port")) = c_udp_src_port
         REPORT "wrong udp_src_port" SEVERITY ERROR;
       
-    -- check g_statistics_type settings set by sdp_statistics_offload.vhd 
+      -- Check g_statistics_type settings set by sdp_statistics_offload.vhd.
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "sdp_marker") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "sdp_marker")) = TO_UVEC(c_marker, 8)
         REPORT "wrong sdp_marker" SEVERITY ERROR;
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "sdp_nof_signal_inputs") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "sdp_nof_signal_inputs")) = TO_UVEC(c_nof_signal_inputs, 8)
@@ -291,7 +289,7 @@ BEGIN
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "sdp_nof_statistics_per_packet") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "sdp_nof_statistics_per_packet")) = TO_UVEC(c_nof_statistics_per_packet, 16)
         REPORT "wrong sdp_nof_statistics_per_packet: " SEVERITY ERROR;
       
-    -- check some values from sdp_source_info
+      -- Check some values from sdp_source_info.
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "sdp_observation_id") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "sdp_observation_id")) = sdp_info.observation_id
         REPORT "wrong sdp_observation_id" SEVERITY ERROR;
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "sdp_station_id") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "sdp_station_id")) = sdp_info.station_id
@@ -310,33 +308,39 @@ BEGIN
         REPORT "wrong sdp_source_info_gn_id" SEVERITY ERROR;
       ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "sdp_block_period") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "sdp_block_period")) = sdp_info.block_period
         REPORT "wrong sdp_block_period" SEVERITY ERROR;
-    WAIT;
+      
+      -- Check variable header info.
+      ASSERT rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "sdp_data_id") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "sdp_data_id")) = TO_UVEC(rx_block_cnt + c_sdp_S_pn * gn_index, 32)
+        REPORT "wrong block count number, received data_id not same as counted blocks" SEVERITY ERROR;
+    END IF;
   END PROCESS;
 
-  -- Count number of blocks in a sync interval, rx_request is used to start counting from 0.
+  -- Count number of blocks in a sync interval.
+  -- There is no active test_offload_sosi.sync to restart the count. Therefore capture the in_sosi.sync in in_sync_hold, and 
+  -- use in_sync_hold with test_offload_sosi.sop to start counting blocks (packets) from 0, at the start of every sync interval.
   p_rx_block_cnt : PROCESS(dp_clk)
   BEGIN
     IF rising_edge(dp_clk) THEN
       IF test_offload_sosi.sop = '1' THEN
-        IF rx_request = '1' THEN 
+        IF in_sync_hold = '1' THEN 
           rx_block_cnt <= 0;
-          rx_request   <= '0';
+          in_sync_hold <= '0';
         ELSE
           rx_block_cnt <= rx_block_cnt + 1;
         END IF;
       END IF;
       IF in_sosi.sync = '1' THEN
-        rx_request <= '1';
+        in_sync_hold <= '1';
       END IF;
     END IF;
   END PROCESS;
 
-  -- Capture rx_bsn from header
+  -- Capture rx_bsn from header.
   rx_bsn <= TO_UINT(rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "dp_bsn") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "dp_bsn")+16));
-  -- Keep rx_bsn from previous header
+  -- Keep rx_bsn from previous header.
   rx_prev_bsn <= rx_bsn WHEN rising_edge(dp_clk);
 
-  -- verify number of blocks between 2 syncs and between 2 changed bsn numbers 
+  -- Verify number of blocks between 2 syncs and between 2 changed bsn numbers.
   p_verify_nof_blocks : PROCESS(dp_clk)
   BEGIN
     IF rising_edge(dp_clk) THEN
@@ -351,12 +355,6 @@ BEGIN
         IF rx_prev_bsn > 0 AND rx_bsn > rx_prev_bsn THEN
           ASSERT (rx_bsn - rx_prev_bsn) = c_nof_block_per_sync REPORT "wrong number of blocks between 2 bsn numbers" SEVERITY ERROR;
         END IF;
-
-        rx_data_id <= TO_UINT(rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "sdp_data_id") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "sdp_data_id")));
-        IF test_offload_sosi.eop = '1' THEN
-          ASSERT rx_data_id = rx_block_cnt + c_sdp_S_pn * gn_index REPORT "wrong block count number, received data_id not same as counted blocks" SEVERITY ERROR;
-        END IF;
-
       END IF;
       test_offload_siso <= c_dp_siso_rdy;
     END IF;
@@ -379,7 +377,7 @@ BEGIN
   BEGIN
     proc_common_wait_until_low(mm_clk, mm_rst);
     proc_common_wait_some_cycles(mm_clk, 10);
-    -- write ethernet destinations via reg_hdr_dat_mosi
+    -- Write ethernet destinations via reg_hdr_dat_mosi.
     proc_mem_mm_bus_wr(c_hdr_dat_mm_addr_udp_src_port, TO_UINT(c_udp_src_port), mm_clk, hdr_dat_miso, hdr_dat_mosi);  
     proc_common_wait_some_cycles(mm_clk, c_cross_clock_domain_latency);
     
@@ -404,14 +402,14 @@ BEGIN
     g_ram => c_ram_buf
   )
   PORT MAP (
-    -- MM write port clock domain
+    -- MM write port clock domain.
     rst_a    => mm_rst,
     clk_a    => mm_clk,
     wr_en_a  => ram_wr_en,
     wr_dat_a => ram_wr_data,
     adr_a    => ram_wr_addr,
 
-    -- DP read only port clock domain
+    -- DP read only port clock domain.
     rst_b    => dp_rst,
     clk_b    => dp_clk,
     adr_b    => master_mosi.address(c_ram_buf.adr_w-1 DOWNTO 0),