Added 16g to exclude libraries

6187dcbd · Pepping · 3bd1c62f · 6187dcbd · 6187dcbd
Commit 6187dcbd authored Feb 11, 2016 by Pepping
--- a/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_dual_rank/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_dual_rank/hdllib.cfg
@@ -3,7 +3,11 @@ hdl_library_clause_name = unb1_ddr3_reorder_dual_rank_lib
 hdl_lib_uses_synth = common technology mm i2c unb1_board dp eth tech_tse diag io_ddr reorder
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_stratixiv
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_single_rank_800_master ip_stratixiv_ddr3_uphy_4g_800_slave ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave 
+
+hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave 
+                   ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave 
+                   ip_stratixiv_ddr3_uphy_4g_single_rank_800_master                   
+                   ip_stratixiv_ddr3_uphy_16g_dual_rank_800

 synth_files =   
    $HDL_BUILD_DIR/unb1/quartus/unb1_ddr3_reorder_dual_rank/sopc_unb1_ddr3_reorder.vhd

--- a/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_single_rank/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_single_rank/hdllib.cfg
@@ -3,7 +3,10 @@ hdl_library_clause_name = unb1_ddr3_reorder_single_rank_lib
 hdl_lib_uses_synth = common technology mm i2c unb1_board dp eth tech_tse diag io_ddr reorder
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_stratixiv
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_master ip_stratixiv_ddr3_uphy_4g_800_slave ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave 
+hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_master 
+                   ip_stratixiv_ddr3_uphy_4g_800_slave 
+                   ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave 
+                   ip_stratixiv_ddr3_uphy_16g_dual_rank_800

 synth_files =   
    $HDL_BUILD_DIR/unb1/quartus/unb1_ddr3_reorder_single_rank/sopc_unb1_ddr3_reorder.vhd