Ported tb_phy_xaui.vhd to tb_ip_stratixiv_phy_xaui.vhd.

Ported wave_tb_phy_xaui.do to wave_tb_ip_stratixiv_phy_xaui.do.

Ported tb_phy_xaui.vhd to tb_ip_stratixiv_phy_xaui.vhd.
6056f0a3 · Eric Kooistra · 1cce0adf · 6056f0a3 · 6056f0a3 · 6056f0a3
Commit 6056f0a3 authored 10 years ago by Eric Kooistra
--- a/libraries/technology/ip_stratixiv/phy_xaui/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/phy_xaui/hdllib.cfg
 hdl_lib_name = ip_stratixiv_phy_xaui
 hdl_library_clause_name = ip_stratixiv_phy_xaui_lib
-hdl_lib_uses = 
+hdl_lib_uses = common
 hdl_lib_technology = ip_stratixiv

 build_sim_dir = $HDL_BUILD_DIR
@@ -17,6 +17,7 @@ synth_files =
    ip_stratixiv_phy_xaui_soft.vhd
    
 test_bench_files = 
+    tb_ip_stratixiv_phy_xaui.vhd

 synth_copy_files =
    

--- a/libraries/technology/ip_stratixiv/phy_xaui/tb_ip_stratixiv_phy_xaui.vhd
+++ b/libraries/technology/ip_stratixiv/phy_xaui/tb_ip_stratixiv_phy_xaui.vhd
+--------------------------------------------------------------------------------
+--
+-- Copyright (C) 2011
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+--------------------------------------------------------------------------------
+
+-- Purpose: Test bench for the MegaWizard-generated ip_stratixiv_phy_xaui_0.
+-- Usage:
+--   > do wave_tb_ip_stratixiv_phy_xaui.do
+--   > run 3 us
+
+LIBRARY IEEE, common_lib;                   
+USE IEEE.STD_LOGIC_1164.ALL;    
+USE common_lib.common_pkg.ALL;
+USE common_lib.common_interface_layers_pkg.ALL;
+
+ENTITY tb_ip_stratixiv_phy_xaui IS  
+END ENTITY tb_ip_stratixiv_phy_xaui;
+
+ARCHITECTURE str of tb_ip_stratixiv_phy_xaui IS
+
+  CONSTANT c_tr_clk_per          : TIME := 6.4 ns;  -- 156.25 MHz
+  CONSTANT c_tx_clk_per          : TIME := 6.4 ns;  -- 156.25 MHz
+  CONSTANT c_mm_clk_per          : TIME := 25 ns;   -- 40 MHz
+
+  CONSTANT c_xgmii_d_test        : STD_LOGIC_VECTOR(c_xgmii_data_w-1 DOWNTO 0) := x"DEADBEEFCAFEBABE";
+ 
+  SIGNAL tr_clk                  : STD_LOGIC := '0';
+  SIGNAL tx_clk                  : STD_LOGIC := '0';
+  SIGNAL rx_clk                  : STD_LOGIC;
+
+  SIGNAL mm_clk                  : STD_LOGIC := '0';
+  SIGNAL mm_rst                  : STD_LOGIC := '1';
+
+  SIGNAL xaui_loopback           : STD_LOGIC_VECTOR(c_nof_xaui_lanes-1 DOWNTO 0);
+
+  --XGMII data and control combined:
+  SIGNAL xgmii_tx_dc             : STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0);
+  SIGNAL xgmii_rx_dc             : STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0);
+
+  --XGMII control bits (one for each XGMII lane):
+  SIGNAL xgmii_tx_c              : STD_LOGIC_VECTOR(c_xgmii_ctrl_w-1 DOWNTO 0);
+  SIGNAL xgmii_rx_c              : STD_LOGIC_VECTOR(c_xgmii_ctrl_w-1 DOWNTO 0);
+
+  --XGMII data
+  SIGNAL xgmii_tx_d              : STD_LOGIC_VECTOR(c_xgmii_data_w-1 DOWNTO 0);
+  SIGNAL xgmii_rx_d              : STD_LOGIC_VECTOR(c_xgmii_data_w-1 DOWNTO 0);
+
+  -- Important status signal: only send user data after you know the receiver's channel_aligned='1'.
+  SIGNAL rx_channelaligned       : STD_LOGIC;
+
+BEGIN
+
+  tr_clk  <= NOT tr_clk AFTER c_tr_clk_per/2;    
+  tx_clk  <= NOT tx_clk AFTER c_tx_clk_per/2;    
+  mm_clk  <= NOT mm_clk AFTER c_mm_clk_per/2; 
+
+  p_mm_rst : PROCESS 
+  BEGIN
+    mm_rst<='1';
+--    WAIT FOR 4*c_mm_clk_per; -- Releasing reset here instead of after 80ns will cause the 64bit RX boundary to be 'correct'.
+    WAIT FOR 6*c_mm_clk_per; -- We don't want to base rest of development on lucky alignment. This 80ns delay gives us a normal, 32-bit RX boundary.
+    WAIT UNTIL rising_edge(mm_clk);
+    mm_rst<='0';  
+    WAIT;
+  END PROCESS;
+
+  p_xgmii_data_ctrl : PROCESS
+  BEGIN
+    xgmii_tx_d <= c_xgmii_d_idle;
+    xgmii_tx_c <= c_xgmii_c_idle;
+
+    WAIT UNTIL rx_channelaligned = '1';
+    WAIT UNTIL rising_edge(tx_clk);
+
+    xgmii_tx_d <= c_xgmii_d_test;
+    xgmii_tx_c <= c_xgmii_c_data;
+
+    WAIT;
+  END PROCESS;
+
+  -- Combine data and control into XGMII
+  xgmii_tx_dc <= xgmii_dc(xgmii_tx_d, xgmii_tx_c);
+
+  -- Extract data (d) from combined data+control (dc) XGMII
+  xgmii_rx_d <= xgmii_d(xgmii_rx_dc);
+  xgmii_rx_c <= xgmii_c(xgmii_rx_dc);
+
+  -- DUT:
+  u_ip_phy_xaui : ENTITY work.ip_stratixiv_phy_xaui_0
+  PORT MAP (
+  	pll_ref_clk          => tr_clk,
+  	xgmii_tx_clk         => tx_clk,
+  	xgmii_rx_clk         => rx_clk,
+  	xgmii_rx_dc          => xgmii_rx_dc,
+  	xgmii_tx_dc          => xgmii_tx_dc,
+  	xaui_rx_serial_data  => xaui_loopback,
+  	xaui_tx_serial_data  => xaui_loopback,
+  	rx_ready             => OPEN,
+  	tx_ready             => OPEN,
+  	phy_mgmt_clk         => mm_clk,
+  	phy_mgmt_clk_reset   => mm_rst,
+  	phy_mgmt_address     => (OTHERS=>'0'),
+  	phy_mgmt_read        => '0',
+  	phy_mgmt_readdata    => OPEN,
+  	phy_mgmt_write       => '0',
+  	phy_mgmt_writedata   => (OTHERS=>'0'),
+  	phy_mgmt_waitrequest => OPEN,
+
+    rx_channelaligned    => rx_channelaligned
+  );
+
+END ARCHITECTURE str;
+
--- a/libraries/technology/ip_stratixiv/phy_xaui/wave_tb_ip_stratixiv_phy_xaui.do
+++ b/libraries/technology/ip_stratixiv/phy_xaui/wave_tb_ip_stratixiv_phy_xaui.do
+onerror {resume}
+quietly WaveActivateNextPane {} 0
+add wave -noupdate -divider as
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/tr_clk
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/mm_clk
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/mm_rst
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/xaui_loopback
+add wave -noupdate -divider {XGMII DATA CTRL}
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/tx_clk
+add wave -noupdate -color Cyan -radix hexadecimal /tb_ip_stratixiv_phy_xaui/xgmii_tx_dc
+add wave -noupdate -color Cyan -radix hexadecimal /tb_ip_stratixiv_phy_xaui/xgmii_tx_c
+add wave -noupdate -color Cyan -radix hexadecimal /tb_ip_stratixiv_phy_xaui/xgmii_tx_d
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/rx_clk
+add wave -noupdate -color Magenta -radix hexadecimal /tb_ip_stratixiv_phy_xaui/xgmii_rx_dc
+add wave -noupdate -color Magenta -radix hexadecimal /tb_ip_stratixiv_phy_xaui/xgmii_rx_c
+add wave -noupdate -color Magenta -radix hexadecimal /tb_ip_stratixiv_phy_xaui/xgmii_rx_d
+add wave -noupdate -divider {CHANNEL ALIGNED}
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/rx_channelaligned
+add wave -noupdate -divider PHY
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/pll_ref_clk
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/xgmii_tx_clk
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/xgmii_rx_clk
+add wave -noupdate -radix hexadecimal /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/xgmii_rx_dc
+add wave -noupdate -radix hexadecimal /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/xgmii_tx_dc
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/xaui_rx_serial_data
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/xaui_tx_serial_data
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_ready
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/tx_ready
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/phy_mgmt_clk
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/phy_mgmt_clk_reset
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/phy_mgmt_address
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/phy_mgmt_read
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/phy_mgmt_readdata
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/phy_mgmt_write
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/phy_mgmt_writedata
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/phy_mgmt_waitrequest
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_digitalreset
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/tx_digitalreset
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_channelaligned
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_syncstatus
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_disperr
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_errdetect
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_analogreset
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_invpolarity
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_set_locktodata
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_set_locktoref
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_seriallpbken
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/tx_invpolarity
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_is_lockedtodata
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_phase_comp_fifo_error
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_is_lockedtoref
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_rlv
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_rmfifoempty
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_rmfifofull
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/tx_phase_comp_fifo_error
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_patterndetect
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_rmfifodatadeleted
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_rmfifodatainserted
+add wave -noupdate /tb_ip_stratixiv_phy_xaui/u_ip_phy_xaui/rx_runningdisp
+TreeUpdate [SetDefaultTree]
+WaveRestoreCursors {{Cursor 1} {1150911 ps} 0} {{Cursor 2} {19416921 ps} 0}
+configure wave -namecolwidth 406
+configure wave -valuecolwidth 252
+configure wave -justifyvalue left
+configure wave -signalnamewidth 0
+configure wave -snapdistance 10
+configure wave -datasetprefix 0
+configure wave -rowmargin 4
+configure wave -childrowmargin 2
+configure wave -gridoffset 0
+configure wave -gridperiod 1
+configure wave -griddelta 40
+configure wave -timeline 0
+configure wave -timelineunits ns
+update
+WaveRestoreZoom {0 ps} {3150 ns}