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Commit 5fa880e5 authored by Pepping's avatar Pepping
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###############################################################################
#
# Copyright (C) 2014
# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
###############################################################################
# This QSF is sourced by other design QSF files.
# ==============================================
# Note: This file can ONLY BE SOURCED (use SOURCE_TCL_SCRIPT_FILE so it will be TCL interpreted), e.g.
# by another QSF, otherwise many TCL commands such as "$::env(RADIOHDL)" do not work.
# This file contains includes that should be added to another project QSF before
# user contraints and/or QIPs are added.
# Device:
set_global_assignment -name FAMILY "Stratix IV"
set_global_assignment -name DEVICE EP4SGX230KF40C2
# Compilation flow:
set_global_assignment -name SMART_RECOMPILE ON
# Optimize for performance:
set_global_assignment -name OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
# Remote Upgrade:
set_global_assignment -name STRATIXIII_UPDATE_MODE REMOTE
set_global_assignment -name STRATIXIII_CONFIGURATION_SCHEME "ACTIVE SERIAL"
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name STRATIXII_CONFIGURATION_DEVICE EPCS128
# Timing constraints
set_global_assignment -name SDC_FILE $::env(RADIOHDL)/boards/uniboard1/libraries/unb1_board/quartus/unb1_board_head.sdc
# Pass compile stamps as generics (passed to top-level when $UNB_COMPILE_STAMPS is set)
if { [info exists ::env(UNB_COMPILE_STAMPS) ] } {
set_parameter -name g_stamp_date [clock format [clock seconds] -format {%Y%m%d}]
set_parameter -name g_stamp_time [clock format [clock seconds] -format {%H%M%S}]
post_message -type info "RADIOHDL: using SVN revision $::env(RADIOHDL_SVN_REVISION)"
set_parameter -name g_stamp_svn [regsub -all {[^0-9]} [exec echo $::env(RADIOHDL_SVN_REVISION)] ""]
}
###############################################################################
#
# Copyright (C) 2013
# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
###############################################################################
# Definition of clock frequencies
set_time_format -unit ns -decimal_places 3
create_clock -name "dp_clk" -period 5.000ns [get_ports {apertif_unb1_fn_beamformer:u_revision|ctrl_unb1_board:u_ctrl|dp_clk}]
create_clock -name {CLK} -period 5.000 -waveform { 0.000 2.500 } [get_ports {CLK}]
create_clock -name {ETH_CLK} -period 40.000 -waveform { 0.000 20.000 } [get_ports {ETH_clk}]
create_clock -name {SB_CLK} -period 6.400 -waveform { 0.000 3.200 } [get_ports {SB_CLK}]
create_clock -name {SA_CLK} -period 6.400 -waveform { 0.000 3.200 } [get_ports {SA_CLK}]
create_clock -name {ADC_BI_A_CLK} -period 2.500 -waveform { 0.000 1.250 } [get_ports {ADC_BI_A_CLK}]
create_clock -name {ADC_BI_D_CLK} -period 2.500 -waveform { 0.000 1.250 } [get_ports {ADC_BI_D_CLK}]
###############################################################################
#
# Copyright (C) 2014
# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
###############################################################################
# This QSF is sourced by other design QSF files.
# ==============================================
# Note: This file can ONLY BE SOURCED (use SOURCE_TCL_SCRIPT_FILE so it will be TCL interpreted), e.g.
# by another QSF, otherwise many TCL commands such as "$::env(RADIOHDL)" do not work.
#
# This file contains includes that should be added to another project QSF after certain
# user contraints (DDR3 timing constraints for instance) have been included.
# Post Timing constraints
set_global_assignment -name SDC_FILE $::env(RADIOHDL)/boards/uniboard1/libraries/unb1_board/quartus/unb1_board_tail.sdc
###############################################################################
#
# Copyright (C) 2013
# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
###############################################################################
# Apply timing commands and definition of clock groups
derive_pll_clocks
derive_clock_uncertainty
# Effectively set false path from this clock to all other clocks
set_clock_groups -asynchronous -group [get_clocks altera_reserved_tck]
set_clock_groups -asynchronous -group [get_clocks SB_CLK]
set_clock_groups -asynchronous -group [get_clocks SA_CLK]
set_clock_groups -asynchronous -group [get_clocks ETH_CLK]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[0]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[1]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[2]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[3]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|altpll_0|sd1|pll7|clk[0]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|altpll_0|sd1|pll7|clk[1]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|altpll_0|sd1|pll7|clk[2]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|altpll_0|sd1|pll7|clk[3]]
# QSYS, second PLL
set_clock_groups -asynchronous -group [get_clocks *|altpll_1|sd1|pll7|clk[0]]
set_clock_groups -asynchronous -group [get_clocks CLK]
set_clock_groups -asynchronous -group [get_clocks {*|altpll_component|auto_generated|pll1|clk[0]}]
set_clock_groups -asynchronous -group [get_clocks ADC_BI_A_CLK]
set_clock_groups -asynchronous -group [get_clocks ADC_BI_D_CLK]
# Transceivers: ALTGX generated RX clock
set_clock_groups -asynchronous -group [get_clocks {*|receive_pcs0|clkout}]
# Transceivers: ALTGX generated TX clock
set_clock_groups -asynchronous -group [get_clocks {*|transmit_pcs0|clkout}]
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