added the testbenches

boards/uniboard2/designs/unb2_test/revisions/unb2_test_10GbE/hdllib.cfg

@@ -10,7 +10,7 @@ synth_files =
     unb2_test_10GbE.vhd
 
 test_bench_files = 
-#    tb_unb2_test_10GbE.vhd
+    tb_unb2_test_10GbE.vhd
 
 modelsim_copy_files =
     ../../src/hex hex

boards/uniboard2/designs/unb2_test/revisions/unb2_test_10GbE/tb_unb2_test_10GbE.vhd

+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2015
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+
+
+LIBRARY IEEE, unb1_test_lib;
+USE IEEE.std_logic_1164.ALL;
+
+
+ENTITY tb_unb2_test_10GbE IS
+END tb_unb2_test_10GbE;
+
+
+ARCHITECTURE tb OF tb_unb2_test_10GbE IS
+BEGIN
+  u_tb_unb2_test : ENTITY unb2_test_lib.tb_unb2_test
+  GENERIC MAP (
+    g_design_name => "unb2_test_10GbE",
+    g_sim_node_nr => 0 --node0
+  );
+END tb;
+

boards/uniboard2/designs/unb2_test/revisions/unb2_test_1GbE/hdllib.cfg

@@ -10,7 +10,7 @@ synth_files =
     unb2_test_1GbE.vhd
 
 test_bench_files = 
-#    tb_unb2_test_1GbE.vhd
+    tb_unb2_test_1GbE.vhd
 
 modelsim_copy_files =
     ../../src/hex hex

boards/uniboard2/designs/unb2_test/revisions/unb2_test_1GbE/tb_unb2_test_1GbE.vhd

+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2015
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+
+
+LIBRARY IEEE, unb1_test_lib;
+USE IEEE.std_logic_1164.ALL;
+
+
+ENTITY tb_unb2_test_1GbE IS
+END tb_unb2_test_1GbE;
+
+
+ARCHITECTURE tb OF tb_unb2_test_1GbE IS
+BEGIN
+  u_tb_unb2_test : ENTITY unb2_test_lib.tb_unb2_test
+  GENERIC MAP (
+    g_design_name => "unb2_test_1GbE",
+    g_sim_node_nr => 0 --node0
+  );
+END tb;
+

boards/uniboard2/designs/unb2_test/revisions/unb2_test_all/hdllib.cfg

@@ -10,7 +10,7 @@ synth_files =
     unb2_test_all.vhd
 
 test_bench_files = 
-#    tb_unb2_test_all.vhd
+    tb_unb2_test_all.vhd
 
 modelsim_copy_files =
     ../../src/hex hex

boards/uniboard2/designs/unb2_test/revisions/unb2_test_all/tb_unb2_test_all.vhd

+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2015
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+
+
+LIBRARY IEEE, unb1_test_lib;
+USE IEEE.std_logic_1164.ALL;
+
+
+ENTITY tb_unb2_test_all IS
+END tb_unb2_test_all;
+
+
+ARCHITECTURE tb OF tb_unb2_test_all IS
+BEGIN
+  u_tb_unb2_test : ENTITY unb2_test_lib.tb_unb2_test
+  GENERIC MAP (
+    g_design_name => "unb2_test_all",
+    g_sim_node_nr => 0 --node0
+  );
+END tb;
+

boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr/hdllib.cfg

@@ -10,7 +10,7 @@ synth_files =
     unb2_test_ddr.vhd
 
 test_bench_files = 
-#    tb_unb2_test_ddr.vhd
+    tb_unb2_test_ddr.vhd
 
 modelsim_copy_files =
     ../../src/hex hex

boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr/tb_unb2_test_ddr.vhd

+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2015
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+
+
+LIBRARY IEEE, unb1_test_lib;
+USE IEEE.std_logic_1164.ALL;
+
+
+ENTITY tb_unb2_test_ddr IS
+END tb_unb2_test_ddr;
+
+
+ARCHITECTURE tb OF tb_unb2_test_ddr IS
+BEGIN
+  u_tb_unb2_test : ENTITY unb2_test_lib.tb_unb2_test
+  GENERIC MAP (
+    g_design_name => "unb2_test_ddr",
+    g_sim_node_nr => 0 --node0
+  );
+END tb;
+