Wrap ring O_rn by MOD 32 to fit gn_index range of 0:31.

applications/disturb2/libraries/disturb/src/vhdl/disturb_station.vhd

@@ -410,7 +410,9 @@ ARCHITECTURE str OF disturb_station IS
   CONSTANT c_nof_mac                   : NATURAL := 12; -- Using 9 out of 12 (this is NOT optimized away during synthesis), must match one of the MAC IP variations, e.g. 1, 3, 4, 12, 24, 48
 
   SIGNAL gn_index : NATURAL := 0;
+  SIGNAL O_rn     : NATURAL := 0;
   SIGNAL this_rn  : STD_LOGIC_VECTOR(c_byte_w-1 DOWNTO 0);
+
   ----------------------------------------------
   -- BF 
   ----------------------------------------------
@@ -541,7 +543,6 @@ ARCHITECTURE str OF disturb_station IS
   SIGNAL disturb_info                      : t_disturb_info := c_disturb_info_rst;
   SIGNAL ring_info                         : t_ring_info;
 
-
 BEGIN
 
   gn_index <= TO_UINT(gn_id);
@@ -597,7 +598,10 @@ BEGIN
     ring_info => ring_info
   );
 
-  this_rn <= TO_UVEC(gn_index - TO_UINT(ring_info.O_rn), c_byte_w) WHEN rising_edge(dp_clk); -- Using register to ease timing closure.
+  -- Map O_rn in gn_index range 0:31 (c_sdp_W_gn_id = 5), to determine RN
+  -- index of this_rn
+  O_rn <= TO_UINT(ring_info.O_rn(c_sdp_W_gn_id-1 DOWNTO 0));
+  this_rn <= TO_UVEC(gn_index - O_rn, c_byte_w) WHEN rising_edge(dp_clk);  -- Use register to ease timing closure.
 
   -----------------------------------------------------------------------------
   -- node_adc_input_and_timing (AIT)

applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd

@@ -422,6 +422,7 @@ ARCHITECTURE str OF sdp_station IS
   CONSTANT c_ring_nof_mac              : NATURAL := 12; -- Using 9 out of 12 (this is NOT optimized away during synthesis), must match one of the MAC IP variations, e.g. 1, 3, 4, 12, 24, 48
 
   SIGNAL gn_index                   : NATURAL := 0;
+  SIGNAL O_rn                       : NATURAL := 0;
   SIGNAL this_rn                    : STD_LOGIC_VECTOR(c_byte_w-1 DOWNTO 0);
 
   SIGNAL sdp_info                   : t_sdp_info := c_sdp_info_rst;
@@ -612,7 +613,10 @@ BEGIN
     ring_info => ring_info
   );
 
-  this_rn <= TO_UVEC(gn_index - TO_UINT(ring_info.O_rn), c_byte_w) WHEN rising_edge(dp_clk); -- Using register to ease timing closure.
+  -- Map O_rn in gn_index range 0:31 (c_sdp_W_gn_id = 5), to determine RN
+  -- index of this_rn
+  O_rn <= TO_UINT(ring_info.O_rn(c_sdp_W_gn_id-1 DOWNTO 0));
+  this_rn <= TO_UVEC(gn_index - O_rn, c_byte_w) WHEN rising_edge(dp_clk);  -- Use register to ease timing closure.
 
   -----------------------------------------------------------------------------
   -- node_adc_input_and_timing (AIT)