Merge branch 'master' of git.astron.nl:desp/hdl

applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station.sdc

@@ -86,8 +86,8 @@ set_clock_groups -asynchronous -group [get_clocks pll_clk400]
 #set_clock_groups -asynchronous -group [get_clocks {*mac_clock*xcvr_fpll_a10_0|outclk0}]
 #set_clock_groups -asynchronous -group [get_clocks {*dp_clk*xcvr_fpll_a10_0|outclk0}]
 #set_clock_groups -asynchronous -group [get_clocks {*xcvr_fpll_a10_0|outclk1}]
-set_clock_groups -asynchronous -group [get_clocks {*xcvr_fpll_a10_0|outclk3}]
-
+set_clock_groups -asynchronous -group [get_clocks {*_board_clk125_pll|*xcvr_fpll_a10_0|outclk2}]
+set_clock_groups -asynchronous -group [get_clocks {*_board_clk125_pll|*xcvr_fpll_a10_0|outclk3}]
 
 set_clock_groups -asynchronous -group [get_clocks {*xcvr_native_a10_0|g_xcvr_native_insts[*]|rx_pma_clk}]
 

applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl

@@ -523,7 +523,7 @@ set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to BCK_REF_CLK
 set_location_assignment PIN_V9 -to BCK_REF_CLK
 set_location_assignment PIN_V10 -to "BCK_REF_CLK(n)"
 
-set_location_assignment PIN_V12 -to JESD204B_SYSREF
+set_location_assignment PIN_Y13 -to JESD204B_SYSREF
 set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYSREF
 
 set_location_assignment PIN_U12 -to JESD204B_SYNC_N[0]

applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_adc/lofar2_unb2c_sdp_station_adc.vhd

@@ -22,7 +22,7 @@
 -- Purpose:  
 --   Wrapper for Lofar2 SDP Station adc design
 -- Description:
---   Unb2b version for lab testing
+--   Unb2c version for lab testing
 --   Contains complete AIT input stage with 12 ADC streams
 
 

applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/lofar2_unb2c_sdp_station_bf.vhd

@@ -22,7 +22,7 @@
 -- Purpose:  
 --   Wrapper for Lofar2 SDP Station beamformer design
 -- Description:
---   Unb2b version for lab testing
+--   Unb2c version for lab testing
 --   Contains complete AIT input stage with 12 ADC streams, FSUB and BF
 
 

applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_fsub/lofar2_unb2c_sdp_station_fsub.vhd

@@ -22,7 +22,7 @@
 -- Purpose:  
 --   Wrapper for Lofar2 SDP Station filterbank design
 -- Description:
---   Unb2b version for lab testing
+--   Unb2c version for lab testing
 --   Contains complete AIT input stage with 12 ADC streams and FSUB