fixed bugs with connections to arria10 IP

libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd

@@ -28,6 +28,7 @@ USE dp_lib.dp_stream_pkg.ALL;
 USE common_lib.common_mem_pkg.ALL;
 USE tr_xaui_lib.tr_xaui_pkg.ALL;
 USE technology_lib.technology_select_pkg.ALL;
+USE technology_lib.technology_pkg.ALL;
 
 ENTITY tr_10GbE IS
   GENERIC (
@@ -189,6 +190,9 @@ ARCHITECTURE str OF tr_10GbE IS
   SIGNAL xaui_rx_arr                    : t_xaui_arr(g_nof_macs-1 DOWNTO 0);
   SIGNAL xaui_tx_arr                    : t_xaui_arr(g_nof_macs-1 DOWNTO 0);  
 
+  -- signals for arria 10
+  SIGNAL tx_serial_data_internal        : std_logic_vector(g_nof_macs-1 DOWNTO 0);
+  SIGNAL rx_serial_data_internal        : std_logic_vector(g_nof_macs-1 DOWNTO 0);
   SIGNAL tx_parallel_data               : std_logic_vector(64*g_nof_macs-1 DOWNTO 0);
   SIGNAL rx_parallel_data               : std_logic_vector(64*g_nof_macs-1 DOWNTO 0);
   SIGNAL tx_control                     : std_logic_vector(8*g_nof_macs-1 DOWNTO 0);
@@ -541,16 +545,20 @@ BEGIN
     end generate;
 
     no_lpbk_xgmii: IF g_lpbk_xgmii = FALSE generate
-      xaui_xgmii_tx_dc_arr <= tr_xaui_pkg.xgmii_dc(mac_xgmii_tx_dc_arr);
-      mac_xgmii_rx_dc_arr  <= tr_xaui_pkg.xgmii_dc(rx_parallel_data; rx_control);
+      gen_arrays : for i in 0 to g_nof_macs-1 generate	    
+        tx_parallel_data(64*i+63 downto 64*i)  <= tr_xaui_lib.tr_xaui_pkg.xgmii_d(mac_xgmii_tx_dc_arr(i));
+        tx_control(8*i+7 downto 8*i)           <= tr_xaui_lib.tr_xaui_pkg.xgmii_c(mac_xgmii_tx_dc_arr(i));
+        mac_xgmii_rx_dc_arr(i)                 <= tr_xaui_lib.tr_xaui_pkg.xgmii_dc(rx_parallel_data(64*i+63 downto 64*i),
+                                                  rx_control(8*i+7 downto 8*i));
+      end generate gen_arrays;
     end generate;
 
 
-    u_transceiver: entity tech_transceiver_arria10_48 
+    u_transceiver: entity work.tech_transceiver_arria10_48 
     generic map (
-      g_nof_xaui         => g_nof_channels
+      g_nof_channels     => g_nof_macs
     )
-    port (
+    port map(
       clk		 => mm_clk,
       reset_p            => mm_rst,
       refclk             => tr_clk,