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Commit 4f392f14 authored by David Brouwer's avatar David Brouwer
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Removed 'r' character in entity tech_memory_ram_crk_crw for correct naming as...

Removed 'r' character in entity tech_memory_ram_crk_crw for correct naming as tech_memory_ram_crk_cw.
parent a220ab91
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1 merge request!363Porting ram for Intel Agilex 7
...@@ -46,7 +46,7 @@ library ip_arria10_e1sg_ram_lib; ...@@ -46,7 +46,7 @@ library ip_arria10_e1sg_ram_lib;
library ip_arria10_e2sg_ram_lib; library ip_arria10_e2sg_ram_lib;
library ip_ip_agi027_xxxx_ram_lib; library ip_ip_agi027_xxxx_ram_lib;
entity tech_memory_ram_crk_crw is -- support different port data widths and corresponding address ranges entity tech_memory_ram_crk_cw is -- support different port data widths and corresponding address ranges
generic ( generic (
g_technology : natural := c_tech_select_default; g_technology : natural := c_tech_select_default;
g_wr_adr_w : natural := 5; g_wr_adr_w : natural := 5;
......
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