Skip to content
Snippets Groups Projects
Commit 4f2b39fb authored by Pieter Donker's avatar Pieter Donker
Browse files

L2SDP-78: made changes for ppsh.offset-cnt in qsys

parent 339a0b60
No related branches found
No related tags found
2 merge requests!28Master,!26Resolve L2SDP-78
Hide whitespace changes
Inline Side-by-side
boards/uniboard2b/designs/unb2b_minimal/quartus/qsys_unb2b_minimal.qsys
+ 22
− 22
View file @ 4f2b39fb
...@@ -78,7 +78,7 @@ ...@@ -78,7 +78,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "952"; value = "960";
type = "String"; type = "String";
} }
} }
...@@ -120,7 +120,7 @@ ...@@ -120,7 +120,7 @@
} }
datum sopceditor_expanded datum sopceditor_expanded
{ {
value = "0"; value = "1";
type = "boolean"; type = "boolean";
} }
} }
...@@ -128,7 +128,7 @@ ...@@ -128,7 +128,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "944"; value = "912";
type = "String"; type = "String";
} }
} }
...@@ -202,7 +202,7 @@ ...@@ -202,7 +202,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "936"; value = "952";
type = "String"; type = "String";
} }
} }
...@@ -223,7 +223,7 @@ ...@@ -223,7 +223,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "928"; value = "944";
type = "String"; type = "String";
} }
} }
...@@ -273,7 +273,7 @@ ...@@ -273,7 +273,7 @@
} }
datum sopceditor_expanded datum sopceditor_expanded
{ {
value = "1"; value = "0";
type = "boolean"; type = "boolean";
} }
} }
...@@ -302,7 +302,7 @@ ...@@ -302,7 +302,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "920"; value = "936";
type = "String"; type = "String";
} }
} }
...@@ -323,7 +323,7 @@ ...@@ -323,7 +323,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "912"; value = "928";
type = "String"; type = "String";
} }
} }
...@@ -4067,7 +4067,7 @@ ...@@ -4067,7 +4067,7 @@
<consumedSystemInfos> <consumedSystemInfos>
<entry> <entry>
<key>ADDRESS_MAP</key> <key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x4000' end='0x4800' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value> <value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x390' end='0x3A0' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3B0' end='0x3B8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3B8' end='0x3C0' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3C0' end='0x3C8' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x4000' end='0x4800' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry> </entry>
<entry> <entry>
<key>ADDRESS_WIDTH</key> <key>ADDRESS_WIDTH</key>
...@@ -5478,7 +5478,7 @@ ...@@ -5478,7 +5478,7 @@
<name>coe_address_export</name> <name>coe_address_export</name>
<role>export</role> <role>export</role>
<direction>Output</direction> <direction>Output</direction>
<width>1</width> <width>2</width>
<lowerBound>0</lowerBound> <lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType> <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port> </port>
...@@ -5542,7 +5542,7 @@ ...@@ -5542,7 +5542,7 @@
<name>avs_mem_address</name> <name>avs_mem_address</name>
<role>address</role> <role>address</role>
<direction>Input</direction> <direction>Input</direction>
<width>1</width> <width>2</width>
<lowerBound>0</lowerBound> <lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType> <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port> </port>
...@@ -5611,7 +5611,7 @@ ...@@ -5611,7 +5611,7 @@
</entry> </entry>
<entry> <entry>
<key>addressSpan</key> <key>addressSpan</key>
<value>8</value> <value>16</value>
</entry> </entry>
<entry> <entry>
<key>addressUnits</key> <key>addressUnits</key>
...@@ -6017,11 +6017,11 @@ ...@@ -6017,11 +6017,11 @@
<suppliedSystemInfos> <suppliedSystemInfos>
<entry> <entry>
<key>ADDRESS_MAP</key> <key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value> <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x10' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry> </entry>
<entry> <entry>
<key>ADDRESS_WIDTH</key> <key>ADDRESS_WIDTH</key>
<value>3</value> <value>4</value>
</entry> </entry>
<entry> <entry>
<key>MAX_SLAVE_DATA_WIDTH</key> <key>MAX_SLAVE_DATA_WIDTH</key>
...@@ -15269,11 +15269,11 @@ ...@@ -15269,11 +15269,11 @@
<suppliedSystemInfos> <suppliedSystemInfos>
<entry> <entry>
<key>ADDRESS_MAP</key> <key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x2000' datawidth='32' /&gt;&lt;/address-map&gt;</value> <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry> </entry>
<entry> <entry>
<key>ADDRESS_WIDTH</key> <key>ADDRESS_WIDTH</key>
<value>13</value> <value>15</value>
</entry> </entry>
<entry> <entry>
<key>MAX_SLAVE_DATA_WIDTH</key> <key>MAX_SLAVE_DATA_WIDTH</key>
...@@ -16058,7 +16058,7 @@ ...@@ -16058,7 +16058,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="jtag_uart_0.avalon_jtag_slave"> end="jtag_uart_0.avalon_jtag_slave">
<parameter name="baseAddress" value="0x03b8" /> <parameter name="baseAddress" value="0x03c0" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
...@@ -16093,7 +16093,7 @@ ...@@ -16093,7 +16093,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="pio_pps.mem"> end="pio_pps.mem">
<parameter name="baseAddress" value="0x03b0" /> <parameter name="baseAddress" value="0x0390" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
...@@ -16121,28 +16121,28 @@ ...@@ -16121,28 +16121,28 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="reg_dpmm_ctrl.mem"> end="reg_dpmm_ctrl.mem">
<parameter name="baseAddress" value="0x03a8" /> <parameter name="baseAddress" value="0x03b8" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="reg_dpmm_data.mem"> end="reg_dpmm_data.mem">
<parameter name="baseAddress" value="0x03a0" /> <parameter name="baseAddress" value="0x03b0" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="reg_mmdp_ctrl.mem"> end="reg_mmdp_ctrl.mem">
<parameter name="baseAddress" value="0x0398" /> <parameter name="baseAddress" value="0x03a8" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="reg_mmdp_data.mem"> end="reg_mmdp_data.mem">
<parameter name="baseAddress" value="0x0390" /> <parameter name="baseAddress" value="0x03a0" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
......
boards/uniboard2b/designs/unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd
+ 1
− 1
View file @ 4f2b39fb
...@@ -50,7 +50,7 @@ PACKAGE qsys_unb2b_minimal_pkg IS ...@@ -50,7 +50,7 @@ PACKAGE qsys_unb2b_minimal_pkg IS
avs_eth_0_tse_write_export : out std_logic; -- export avs_eth_0_tse_write_export : out std_logic; -- export
avs_eth_0_tse_writedata_export : out std_logic_vector(31 downto 0); -- export avs_eth_0_tse_writedata_export : out std_logic_vector(31 downto 0); -- export
clk_clk : in std_logic := 'X'; -- clk clk_clk : in std_logic := 'X'; -- clk
pio_pps_address_export : out std_logic_vector(0 downto 0); -- export pio_pps_address_export : out std_logic_vector(1 downto 0); -- export
pio_pps_clk_export : out std_logic; -- export pio_pps_clk_export : out std_logic; -- export
pio_pps_read_export : out std_logic; -- export pio_pps_read_export : out std_logic; -- export
pio_pps_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export pio_pps_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
......
boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_peripherals_pkg.vhd
+ 1
− 1
View file @ 4f2b39fb
...@@ -165,7 +165,7 @@ PACKAGE unb2b_board_peripherals_pkg IS ...@@ -165,7 +165,7 @@ PACKAGE unb2b_board_peripherals_pkg IS
reg_unb_pmbus_adr_w : NATURAL; -- = 6 reg_unb_pmbus_adr_w : NATURAL; -- = 6
END RECORD; END RECORD;
CONSTANT c_unb2b_board_peripherals_mm_reg_default : t_c_unb2b_board_peripherals_mm_reg := (TRUE, 10, 4, 10, 5, 13, 1, 1, 6, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1, 3, 4, 6); CONSTANT c_unb2b_board_peripherals_mm_reg_default : t_c_unb2b_board_peripherals_mm_reg := (TRUE, 10, 4, 10, 5, 13, 1, 2, 6, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1, 3, 4, 6);
END unb2b_board_peripherals_pkg; END unb2b_board_peripherals_pkg;
......
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment