Fixed default value of wr_snk_out.xon to '1'. This fixes the DDR3 issue on hardware.

libraries/io/ddr/src/vhdl/io_ddr_driver.vhd

@@ -172,6 +172,7 @@ BEGIN
     ctlr_mosi.burstbegin   <= '0';                                   -- only used for legacy DDR controllers, because the controller can derive it internally by counting wr and rd accesses
     ctlr_mosi.burstsize    <= TO_MEM_CTLR_BURSTSIZE(burst_size);     -- burstsize >= 1,
                                                                      -- no need to hold during burst, because the Avalon constantBurstBehaviour=FALSE (default) of the DDR IP slave
+    wr_snk_out.xon         <= '1';                                   -- xon is fixed '1'
     wr_snk_out.ready       <= '0';
     nxt_dvr_done           <= '0';
     nxt_cur_address        <= cur_address;