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Commit 4adf166e authored by Eric Kooistra's avatar Eric Kooistra
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system.yaml:

. added system_name

. renamed peripheral_prefix into subsystem_name

. renamed peripheral_component_name into peripheral_name



peripheral.yaml:

. added dual_clock

. renamed peripheral_component_name into peripheral_name
parent 18d2b97f
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......@@ -17,26 +17,22 @@
# structured naming uses '.' as separator to preserve hierarchy information
# in the name. The format becomes:
#
# Arbitrary 1-level : slave_port_names
# Structured 2-level : peripheral_prefix.slave_name
# Structured 4-level : peripheral_prefix.slave_prefix.slave_name.slave_postfix
# Arbitrary : slave_port_names
# Structured : subsystem_name.slave_prefix.slave_name.slave_postfix
#
# The structured naming uses 4 levels and to preserve this format all 4 levels
# should have names that are != ''. Using '' is allowed, but still the '.'
# should have names that are != ''. Using '' is allowed, but then still the '.'
# will be in the slave port name to preserve the levels.
# Instead of using 4 levels of structure the structure can also use 2 levels
# by omitting the slave_prefix and slave_postfix keys (default None) and using
# only the slave_name key
#
# The name keys are defined in:
#
# - system.yaml
# slave_port_names : define list of arbitrary slave port names or use empty
# string to use structured naming
# peripheral_prefix : extra prefix in case of structured naming, to
# clarify the usage, or to group peripherals or to
# distinguish ports in case there are multiple
# instances of this peripheral
# subsystem_name : extra prefix in case of structured naming, to
# clarify the usage, or to group peripherals or to
# distinguish ports in case there are multiple
# instances of this peripheral
#
# - peripheral.yaml
# slave_prefix : prefix to slave_name, typically the HDL library
......@@ -49,13 +45,11 @@
# """
#
# if slave_port_names[]!='':
# mmBusSlaveName = slave_port_name[] # One level naming: use arbitrary slave port name to identify the base address
# # Use arbitrary slave port name to identify the base address
# mmBusSlaveName = slave_port_name[]
# else:
# # Use structured slave port name to identify the base address
# if slave_prefix==None or slave_postfix==None:
# mmBusSlaveName = peripheral_prefix + '.' + slave_name # Two level naming
# else:
# mmBusSlaveName = peripheral_prefix + '.' + slave_prefix + '.' + slave_name + '.' + slave_postfix # Four level naming
# mmBusSlaveName = subsystem_name + '.' + slave_prefix + '.' + slave_name + '.' + slave_postfix
# return mmBusSlaveName
#
......@@ -72,33 +66,38 @@ protocol_name: args
protocol_version : major.minor
protocol_type : system
library_name : string # filename without extension, so <library_name>.system.yaml
library_name : string # Name of the HDL library of the FPGA system,
# typically same as system_name
system_name : string # Name of the FPGA system, typically the
# filename without the .system.yaml extension
system_description : string
parameters :
- {name : string, value : int | float | string} # system parameter a
- {name : string, value : int | float | string} # system parameter b
- {name : string, value : int | float | string} # system parameter a
- {name : string, value : int | float | string} # system parameter b
# etc.
peripherals :
- peripheral_component_name : string # reference to peripheral_component_name in peripheral.yaml
peripheral_prefix : string
slave_port_names : None # or list of arbitrary slave port names, must match the order of the slave_ports list in the peripheral.yaml
- peripheral_name : string # reference to peripheral_name in peripheral.yaml
subsystem_name : string
slave_port_names : None # or list of arbitrary slave port names, must
# match the order of the slave_ports list in
# the peripheral.yaml
- '' # use structured slave port name
- 'overrule-slave-port-name' # use aribtrary slave port name
- ''
- '' # use structured slave port name
lock_base_address : int # = None
number_of_peripherals : int # = 1, >1 for array
parameters : # use default or overrule
<peripheral_parameter_a> : int | float | string
<peripheral_parameter_b> : int | float | string
- peripheral_component_name : string # reference to peripheral_component_name in peripheral.yaml
- peripheral_name : string # reference to peripheral_name in peripheral.yaml
# etc.
- peripheral_component_name : string # reference to peripheral_component_name in peripheral.yaml
- peripheral_name : string # reference to peripheral_name in peripheral.yaml
# etc.
# etc.
......@@ -111,14 +110,15 @@ protocol_name: args
protocol_version : major.minor
protocol_type : peripheral | system
library_name : string # Name of the HDL library, typically the filename
# without the .peripheral.yaml extension
library_description : string
library_name : string # filename without extension
peripherals :
- peripheral_component_name : string
- peripheral_name : string
parameters :
- {name : string, value : int | float | string} # peripheral parameter a
- {name : string, value : int | float | string} # peripheral parameter b
- {name : string, value : int | float | string} # peripheral parameter a
- {name : string, value : int | float | string} # peripheral parameter b
# etc.
slave_ports :
- slave_prefix : string
......@@ -126,18 +126,19 @@ peripherals :
slave_postfix : string
number_of_slaves : int # = 1, >1 for array
slave_type : string # REG | RAM | FIFO
fields :
- field_name : string
width : int # = 32
bit_offset : int # = 0
access_mode : string # = read/write
side_effect : string # = None
address_offset : int # relative to base
address_length : int # = 1, >1 for array
reset_value : int | float | string
software_value : int | float | string
radix : string
field_description : string
dual_clock : boolean
fields : REG RAM FIFO
- field_name : string
width : int # = 32
bit_offset : int # = 0 0 0
access_mode : string # = read/write
side_effect : string # = None n n
address_offset : int # relative to base n n
address_length : int # = 1, >1 for array n
reset_value : int | float | string n
software_value : int | float | string n
radix : string
field_description : string
- field_name : string
# etc.
slave_description : string
......@@ -148,12 +149,13 @@ peripherals :
peripheral_description : string
- peripheral_component_name : string
- peripheral_name : string
# etc.
# etc.
###############################################################################
#
# Current ARGS YAML file format
......@@ -246,7 +248,7 @@ peripherals :
###############################################################################
# manual style name # structured style keys # structured style name
slave_port_name slave_prefix slave_name slave_postfix peripheral_prefix slave_port_name (4 levels) slave_port_name (2 levels)
slave_port_name slave_prefix slave_name slave_postfix subsystem_name slave_port_name (4 levels) slave_port_name (2 levels)
AVS_ETH_0_MMS_RAM --> ETH -, DATA RAM -, MINIMAL --> MINIMAL.ETH.DATA.RAM MINIMAL.ETH_DATA_RAM
AVS_ETH_0_MMS_REG --> ETH -, CONTROL REG -, MINIMAL --> MINIMAL.ETH.CONTROL.REG MINIMAL.ETH_CONTROL_REG
......@@ -343,7 +345,7 @@ REG_TR_NONBONDED_MESH --> TR_NONBONDED -, CONTROL REG MESH
###############################################################################
# manual style name # structured style keys # structured style name
slave_port_name slave_prefix slave_name slave_postfix peripheral_prefix slave_port_name
slave_port_name slave_prefix slave_name slave_postfix subsystem_name slave_port_name
AVS_ETH_0_MMS_RAM --> ETH -, DATA RAM -, MINIMAL --> MINIMAL.ETH.DATA.RAM
AVS_ETH_0_MMS_REG --> ETH -, CONTROL REG -, MINIMAL --> MINIMAL.ETH.CONTROL.REG
......@@ -429,7 +431,7 @@ REG_TR_10GBE --> TR_10GBE - REG
###############################################################################
# manual style name # structured style keys # structured style name
slave_port_name slave_prefix slave_name slave_postfix peripheral_prefix slave_port_name
slave_port_name slave_prefix slave_name slave_postfix subsystem_name slave_port_name
AVS_ETH_0_MMS_RAM --> ETH -, DATA RAM -, MINIMAL --> MINIMAL.ETH.DATA.RAM
AVS_ETH_0_MMS_REG --> ETH -, CONTROL REG -, MINIMAL --> MINIMAL.ETH.CONTROL.REG
......
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