processed review comments.

libraries/base/dp/src/vhdl/dp_bsn_source_v2.vhd

@@ -59,10 +59,10 @@ ENTITY dp_bsn_source_v2 IS
 
     dp_on_status            : OUT STD_LOGIC;
  
-    bsn_init                : IN  STD_LOGIC_VECTOR(g_bsn_w-1 DOWNTO 0) := (OTHERS=>'0');
     nof_clk_per_sync        : IN  STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0) := TO_UVEC(g_nof_clk_per_sync, c_word_w);
+    bsn_init                : IN  STD_LOGIC_VECTOR(g_bsn_w-1 DOWNTO 0) := (OTHERS=>'0');
     bsn_time_offset         : IN  STD_LOGIC_VECTOR(g_bsn_time_offset_w-1 DOWNTO 0) := (OTHERS=>'0');
-    current_bsn_time_offset : OUT STD_LOGIC_VECTOR(g_bsn_time_offset_w-1 DOWNTO 0);
+    current_bsn_time_offset : OUT STD_LOGIC_VECTOR(g_bsn_time_offset_w-1 DOWNTO 0);  -- output for monitoring purpose in test bench.
 
     src_out                 : OUT t_dp_sosi  -- only uses sync, bsn[], valid, sop and eop
   );
@@ -120,7 +120,7 @@ BEGIN
   dp_on_status <= i_dp_on_status;
   current_bsn_time_offset <= i_current_bsn_time_offset;
 
-  p_state : PROCESS(state, prev_state, dp_on, dp_on_pps, pps, block_size_cnt, clk_cnt, bsn_init, i_src_out, i_dp_on_status, bsn_time_offset_cnt, bsn_time_offset)
+  p_state : PROCESS(state, i_src_out, block_size_cnt, clk_cnt, sync, i_dp_on_status, bsn_time_offset_cnt, bsn_time_offset, nof_clk_per_sync, bsn_init, dp_on, dp_on_pps, pps, prev_state)
   BEGIN  
     nxt_state                   <= state;
     nxt_src_out                 <= i_src_out;
@@ -153,7 +153,7 @@ BEGIN
         nxt_clk_cnt <=  (OTHERS=>'0');
         IF dp_on = '1' THEN 
           IF dp_on_pps = '1' THEN
-            nxt_sync <= '1';
+            nxt_sync <= '1';   -- ensure issue sync at first sync interval for start at PPS.
             IF pps = '1' THEN
               IF UNSIGNED(bsn_time_offset) = 0 THEN
                 nxt_state   <= s_dp_on_sop;
@@ -181,7 +181,6 @@ BEGIN
         nxt_state          <= s_dp_on;
         nxt_block_size_cnt <= (OTHERS=>'0');
         IF prev_state = s_dp_on_eop THEN
-          -- nxt_src_out.bsn(g_bsn_w-1 DOWNTO 0) <= INCR_UVEC(i_src_out.bsn(g_bsn_w-1 DOWNTO 0), 1);
           nxt_src_out.bsn <= INCR_DP_BSN(i_src_out.bsn, 1, g_bsn_w);
         END IF;
         IF sync = '1' THEN 

libraries/base/dp/tb/vhdl/tb_dp_bsn_source_v2.vhd

@@ -19,6 +19,16 @@
 --
 -------------------------------------------------------------------------------
 
+-- Author: P. Donker
+-- Verify if eop and sop come in pairs and if sync is at sop and at expected_sync puls.
+-- The tb is using a SSN (second sample number) and BSN (block sample number) generator as reference
+-- for the test, it uses g_pps_interval and g_block_size for generator timing settings.
+-- Start/Stop BSN source tests:
+-- 1) test 1x asynchronously (dp_on_pps='0') without automatic check, check visualy in wave window.
+-- 2) test 3x synchronously (dp_on_pps='1') with automatic check.
+--
+-- [doc] = https://support.astron.nl/confluence/display/L2M/L6+FWLIB+Design+Document%3A+BSN+source+with+offset
+
 -- Usage:
 -- > as 10
 -- > run -all

libraries/base/dp/tb/vhdl/tb_mms_dp_bsn_source_v2.vhd

@@ -19,10 +19,11 @@
 --
 -------------------------------------------------------------------------------
 -- Purpose:
--- . Test bench for mms_dp_bsn_source
+-- . Test bench for mms_dp_bsn_source_v2
 -- Description:
 -- . Verify DP on, off via MM
 -- . Verify captured BSN via MM during a sync interval
+-- . Verify changing of BSN_time_offset
 --
 -- Usage:
 -- > as 10