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Commit 4845ed69 authored by Eric Kooistra's avatar Eric Kooistra
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Pass on dp_bsn_source_new_interval for start of statistics offload of SST and BST.

parent 5cb598bc
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1 merge request!283Resolve L2SDP-696
......@@ -103,8 +103,8 @@ ENTITY node_sdp_adc_input_and_timing IS
-- Streaming data output
out_sosi_arr : OUT t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0);
dp_bsn_source_restart : OUT STD_LOGIC
dp_bsn_source_restart : OUT STD_LOGIC;
dp_bsn_source_new_interval : OUT STD_LOGIC
);
END node_sdp_adc_input_and_timing;
......@@ -120,6 +120,7 @@ ARCHITECTURE str OF node_sdp_adc_input_and_timing IS
-- Frame parameters
CONSTANT c_bs_sync_timeout : NATURAL := g_bsn_nof_clk_per_sync + g_bsn_nof_clk_per_sync / 10; -- +10% margin
CONSTANT c_bs_bsn_w : NATURAL := 64; -- > 51;
CONSTANT c_bs_aux_w : NATURAL := 2;
CONSTANT c_bs_block_size : NATURAL := c_sdp_N_fft; -- =1024;
CONSTANT c_dp_fifo_dc_size : NATURAL := 64;
......@@ -129,6 +130,9 @@ ARCHITECTURE str OF node_sdp_adc_input_and_timing IS
SIGNAL rx_sysref : STD_LOGIC;
SIGNAL rx_bsn_source_restart : STD_LOGIC;
SIGNAL rx_bsn_source_new_interval : STD_LOGIC;
SIGNAL rx_aux : STD_LOGIC_VECTOR(c_bs_aux_w-1 DOWNTO 0);
SIGNAL dp_aux : STD_LOGIC_VECTOR(c_bs_aux_w-1 DOWNTO 0);
-- Sosis and sosi arrays
SIGNAL rx_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
......@@ -283,7 +287,8 @@ BEGIN
-- Streaming clock domain
bs_sosi => bs_sosi,
bs_restart => rx_bsn_source_restart
bs_restart => rx_bsn_source_restart,
bs_new_interval => rx_bsn_source_new_interval
);
u_bsn_trigger_wg : ENTITY dp_lib.mms_dp_bsn_scheduler
......@@ -494,12 +499,22 @@ BEGIN
-- Output Stage
-- . Thin dual clock fifo to cross from jesd frame clock (rx_clk) to dp_clk domain
-----------------------------------------------------------------------------
-- rx_aux is synchronous with st_sosi_arr
rx_aux(0) <= rx_bsn_source_restart;
rx_aux(1) <= rx_bsn_source_new_interval;
-- dp_aux is synchronous with out_sosi_arr
dp_bsn_source_restart <= dp_aux(0);
dp_bsn_source_new_interval <= dp_aux(1);
u_dp_fifo_dc_arr : ENTITY dp_lib.dp_fifo_dc_arr
GENERIC MAP (
g_nof_streams => c_sdp_S_pn,
g_data_w => c_sdp_W_adc,
g_data_signed => TRUE,
g_bsn_w => c_bs_bsn_w,
g_aux_w => c_bs_aux_w,
g_use_empty => FALSE,
g_use_ctrl => TRUE,
g_use_sync => TRUE,
......@@ -514,8 +529,8 @@ BEGIN
rd_clk => dp_clk,
snk_in_arr => st_sosi_arr,
src_out_arr => out_sosi_arr,
in_aux(0) => rx_bsn_source_restart,
out_aux(0) => dp_bsn_source_restart
in_aux => rx_aux,
out_aux => dp_aux
);
......
......@@ -49,6 +49,8 @@ ENTITY node_sdp_beamformer IS
dp_clk : IN STD_LOGIC;
dp_rst : IN STD_LOGIC;
dp_bsn_source_new_interval : IN STD_LOGIC;
in_sosi_arr : IN t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0);
from_ri_sosi : IN t_dp_sosi;
to_ri_sosi : OUT t_dp_sosi;
......@@ -378,6 +380,8 @@ BEGIN
reg_bsn_monitor_v2_offload_cipo => reg_bsn_monitor_v2_bst_offload_cipo,
in_sosi => bf_sum_sosi,
new_interval => dp_bsn_source_new_interval,
out_sosi => bst_udp_sosi,
out_siso => bst_udp_siso,
......
......@@ -57,14 +57,15 @@ ENTITY node_sdp_filterbank IS
dp_clk : IN STD_LOGIC;
dp_rst : IN STD_LOGIC;
dp_bsn_source_restart : IN STD_LOGIC;
dp_bsn_source_new_interval : IN STD_LOGIC;
in_sosi_arr : IN t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0);
pfb_sosi_arr : OUT t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0);
fsub_sosi_arr : OUT t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0);
sst_udp_sosi : OUT t_dp_sosi;
sst_udp_siso : IN t_dp_siso := c_dp_siso_rst;
dp_bsn_source_restart : IN STD_LOGIC;
mm_rst : IN STD_LOGIC;
mm_clk : IN STD_LOGIC;
......@@ -128,6 +129,7 @@ ARCHITECTURE str OF node_sdp_filterbank IS
SIGNAL selector_en : STD_LOGIC;
SIGNAL weighted_subbands_flag : STD_LOGIC;
SIGNAL dp_bsn_source_restart_pipe : STD_LOGIC;
BEGIN
---------------------------------------------------------------
-- SPECTRAL INVERSION
......@@ -361,6 +363,8 @@ BEGIN
reg_bsn_monitor_v2_offload_cipo => reg_bsn_monitor_v2_sst_offload_cipo,
in_sosi => dp_selector_out_sosi_arr(0),
new_interval => dp_bsn_source_new_interval,
out_sosi => sst_udp_sosi,
out_siso => sst_udp_siso,
......
......@@ -59,14 +59,15 @@ ENTITY node_sdp_oversampled_filterbank IS
dp_clk : IN STD_LOGIC;
dp_rst : IN STD_LOGIC;
dp_bsn_source_restart : IN STD_LOGIC;
dp_bsn_source_new_interval : IN STD_LOGIC;
in_sosi_arr : IN t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0);
pfb_sosi_arr : OUT t_dp_sosi_arr(c_sdp_R_os * c_sdp_P_pfb-1 DOWNTO 0);
fsub_sosi_arr : OUT t_dp_sosi_arr(c_sdp_R_os * c_sdp_P_pfb-1 DOWNTO 0);
sst_udp_sosi : OUT t_dp_sosi;
sst_udp_siso : IN t_dp_siso := c_dp_siso_rst;
dp_bsn_source_restart : IN STD_LOGIC;
mm_rst : IN STD_LOGIC;
mm_clk : IN STD_LOGIC;
......@@ -671,6 +672,8 @@ BEGIN
reg_bsn_monitor_v2_offload_cipo => reg_bsn_monitor_v2_sst_offload_cipo,
in_sosi => dp_selector_out_sosi_arr(0),
new_interval => dp_bsn_source_new_interval,
out_sosi => sst_udp_sosi,
out_siso => sst_udp_siso,
......
......@@ -536,7 +536,8 @@ ARCHITECTURE str OF sdp_station IS
SIGNAL lane_rx_board_sosi_arr : t_dp_sosi_arr(c_nof_lane-1 DOWNTO 0);
SIGNAL lane_tx_board_sosi_arr : t_dp_sosi_arr(c_nof_lane-1 DOWNTO 0);
SIGNAL dp_bsn_source_restart : STD_LOGIC;
SIGNAL dp_bsn_source_restart : STD_LOGIC; -- used to restart WPFB sync interval timing
SIGNAL dp_bsn_source_new_interval : STD_LOGIC; -- used to mask out first sync interval for SST and BST offload
SIGNAL bf_udp_sosi_arr : t_dp_sosi_arr(c_sdp_N_beamsets-1 DOWNTO 0);
SIGNAL bf_udp_siso_arr : t_dp_siso_arr(c_sdp_N_beamsets-1 DOWNTO 0);
......@@ -582,14 +583,15 @@ BEGIN
-- SDP Info register
-----------------------------------------------------------------------------
-- . derive beamlet output MAC, IP and UDP Port as in https://plm.astron.nl/polarion/#/project/LOFAR2System/wiki/L1%20Interface%20Control%20Documents/STAT%20to%20CEP%20ICD
-- . these FW default beamlet output source MAC, IP and UDP port are NOT used in sdp_beamformer_output, because
-- . these FW default beamlet output source MAC, IP and UDP port for 10GbE are NOT used in sdp_beamformer_output, because
-- instead they are MM programmable as set by c_sdp_cep_hdr_field_sel
cep_eth_src_mac <= c_sdp_cep_eth_src_mac_47_16 & RESIZE_UVEC(this_bck_id, c_byte_w) & RESIZE_UVEC(this_chip_id, c_byte_w); -- Simply use chip_id since we only use 1 of the 6*4 = 24 10GbE port.
cep_ip_src_addr <= c_sdp_cep_ip_src_addr_31_16 & RESIZE_UVEC(this_bck_id, c_byte_w) & INCR_UVEC(RESIZE_UVEC(this_chip_id, c_byte_w), 1); -- +1 to avoid IP = *.*.*.0
cep_udp_src_port <= c_sdp_cep_udp_src_port_15_8 & RESIZE_UVEC(gn_id, c_byte_w);
-- . derive statistics offload source MAC/IP/UDP as in: https://plm.astron.nl/polarion/#/project/LOFAR2System/wiki/L2%20Interface%20Control%20Documents/SC%20to%20SDP%20ICD
-- . these FW default statistics offload source MAC, IP and UDP port are used, as set by c_sdp_stat_hdr_field_sel
-- . these FW default statistics offload source MAC, IP and UDP port for 1GbE are used, as set by c_sdp_stat_hdr_field_sel.
-- . the source MAC, IP are the same as for the M&C, because M&C and statistics offload share the same 1GbE
stat_eth_src_mac <= c_sdp_stat_eth_src_mac_47_16 & RESIZE_UVEC(this_bck_id, c_byte_w) & RESIZE_UVEC(this_chip_id, c_byte_w); -- Simply use chip_id since we only use 1 of the 6*4 = 24 10GbE port.
stat_ip_src_addr <= c_sdp_stat_ip_src_addr_31_16 & RESIZE_UVEC(this_bck_id, c_byte_w) & INCR_UVEC(RESIZE_UVEC(this_chip_id, c_byte_w), 1); -- +1 to avoid IP = *.*.*.0
sst_udp_src_port <= c_sdp_sst_udp_src_port_15_8 & RESIZE_UVEC(gn_id, c_byte_w);
......@@ -690,7 +692,8 @@ BEGIN
-- Streaming data output
out_sosi_arr => ait_sosi_arr,
dp_bsn_source_restart => dp_bsn_source_restart
dp_bsn_source_restart => dp_bsn_source_restart,
dp_bsn_source_new_interval => dp_bsn_source_new_interval
);
-----------------------------------------------------------------------------
......@@ -712,6 +715,7 @@ BEGIN
in_sosi_arr => ait_sosi_arr,
fsub_sosi_arr => fsub_sosi_arr,
dp_bsn_source_restart => dp_bsn_source_restart,
dp_bsn_source_new_interval => dp_bsn_source_new_interval,
sst_udp_sosi => udp_tx_sosi_arr(0),
sst_udp_siso => udp_tx_siso_arr(0),
......@@ -769,6 +773,7 @@ BEGIN
in_sosi_arr => ait_sosi_arr,
fsub_sosi_arr => fsub_oversampled_sosi_arr,
dp_bsn_source_restart => dp_bsn_source_restart,
dp_bsn_source_new_interval => dp_bsn_source_new_interval,
sst_udp_sosi => udp_tx_sosi_arr(0),
sst_udp_siso => udp_tx_siso_arr(0),
......@@ -895,6 +900,8 @@ BEGIN
bst_udp_sosi => udp_tx_sosi_arr(2+ beamset_id),
bst_udp_siso => udp_tx_siso_arr(2+ beamset_id),
dp_bsn_source_new_interval => dp_bsn_source_new_interval,
mm_rst => mm_rst,
mm_clk => mm_clk,
......
......@@ -142,7 +142,7 @@ ENTITY sdp_statistics_offload IS
-- Input timing regarding the integration interval of the statistics
in_sosi : IN t_dp_sosi;
new_interval : IN STD_LOGIC := '0';
new_interval : IN STD_LOGIC;
-- Streaming output of offloaded statistics packets
out_sosi : OUT t_dp_sosi;
......@@ -239,6 +239,8 @@ ARCHITECTURE str OF sdp_statistics_offload IS
SIGNAL r : t_reg;
SIGNAL nxt_r : t_reg;
SIGNAL reg_new_interval : STD_LOGIC;
SIGNAL data_id_rec : t_sdp_stat_data_id;
SIGNAL data_id_slv : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
......@@ -563,13 +565,15 @@ BEGIN
nxt_r <= v;
END PROCESS;
-- Register new_interval to ease timing closure. The new_interval will already be active
-- somewhat before the first in_sosi.sync arrives at the sdp_statistics_offload, due to
-- latency in the data path.
reg_new_interval <= new_interval WHEN rising_edge(dp_clk);
-- The in_trigger can skip the first in_sosi.sync. This is necessary if the
-- in_sosi input can be restarted, because then at every restart there is
-- no valid previous in_sosi.sync interval yet. This is used for XST offload,
-- because then the in_sync interval is MM programmable. For SST and BST the
-- new_interval = '0' is not used, because then the in_sosi typically
-- remains on after it was started.
in_trigger <= in_sosi.sync AND NOT new_interval;
-- no valid previous in_sosi.sync interval yet.
in_trigger <= in_sosi.sync AND NOT reg_new_interval;
u_mms_common_variable_delay : ENTITY common_lib.mms_common_variable_delay
PORT MAP (
......
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