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Added technology independent interface for Stratix IV PLL with 200MHz clock...
Added technology independent interface for Stratix IV PLL with 200MHz clock that are used in UniBoard1 designs.
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- libraries/technology/pll/hdllib.cfg 14 additions, 0 deletionslibraries/technology/pll/hdllib.cfg
- libraries/technology/pll/tech_pll_clk200.vhd 58 additions, 0 deletionslibraries/technology/pll/tech_pll_clk200.vhd
- libraries/technology/pll/tech_pll_clk200_p6.vhd 87 additions, 0 deletionslibraries/technology/pll/tech_pll_clk200_p6.vhd
- libraries/technology/pll/tech_pll_component_pkg.vhd 97 additions, 0 deletionslibraries/technology/pll/tech_pll_component_pkg.vhd
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