Wire dvr_done via new dvr_miso.done field instead of via the dvr_miso.waitrequest_n field.

libraries/io/ddr/src/vhdl/io_ddr.vhd

@@ -220,7 +220,7 @@ BEGIN
     dvr_clk                => dvr_clk,
     dvr_rst                => dvr_rst,
     
-    dvr_done               => dvr_miso.waitrequest_n,
+    dvr_done               => dvr_miso.done,
     dvr_en                 => dvr_mosi.burstbegin,
     dvr_wr_not_rd          => dvr_mosi.wr,
     dvr_start_address      => dvr_mosi.address,
@@ -231,7 +231,7 @@ BEGIN
     ctlr_clk               => ctlr_clk_in,
     ctlr_rst               => ctlr_rst_in,
     
-    ctlr_dvr_done          => ctlr_dvr_miso.waitrequest_n,
+    ctlr_dvr_done          => ctlr_dvr_miso.done,
     ctlr_dvr_en            => ctlr_dvr_mosi.burstbegin,
     ctlr_dvr_wr_not_rd     => ctlr_dvr_mosi.wr,
     ctlr_dvr_start_address => ctlr_dvr_mosi.address,
@@ -319,7 +319,7 @@ BEGIN
     dvr_en           => ctlr_dvr_mosi.burstbegin,
     dvr_wr_not_rd    => ctlr_dvr_mosi.wr,
     dvr_wr_flush_en  => ctlr_dvr_mosi.flush,
-    dvr_done         => ctlr_dvr_miso.waitrequest_n,
+    dvr_done         => ctlr_dvr_miso.done,
     ctlr_wr_sosi     => ctlr_wr_flush_snk_in,
 
     -- Output

libraries/io/ddr/src/vhdl/io_ddr_driver.vhd

@@ -99,7 +99,7 @@ ARCHITECTURE str OF io_ddr_driver IS
 BEGIN
 
   -- Map original dvr interface signals to t_mem_ctlr_mosi/miso
-  dvr_miso.waitrequest_n <= dvr_done;             -- Requested wr or rd sequence is done
+  dvr_miso.done     <= dvr_done;             -- Requested wr or rd sequence is done
   dvr_en            <= dvr_mosi.burstbegin;
   dvr_wr_not_rd     <= dvr_mosi.wr;          -- No need to use dvr_mosi.rd
   dvr_start_address <= dvr_mosi.address(c_ctlr_address_w-1 DOWNTO 0);

libraries/io/ddr/tb/vhdl/tb_io_ddr.vhd

@@ -257,7 +257,7 @@ BEGIN
   
   
   -- Map original dvr interface signals to t_mem_ctlr_mosi/miso
-  dvr_done              <= dvr_miso.waitrequest_n;  -- Requested wr or rd sequence is done
+  dvr_done              <= dvr_miso.done;           -- Requested wr or rd sequence is done
   dvr_mosi.burstbegin   <= dvr_en;
   dvr_mosi.wr           <= dvr_wr_not_rd;           -- No need to use dvr_mosi.rd
   dvr_mosi.address      <= RESIZE_MEM_CTLR_ADDRESS(dvr_start_address);