@@ -498,6 +501,10 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
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@@ -498,6 +501,10 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
False = stop dumping packets immediately
False = stop dumping packets immediately
When True maintain reg_memory counters, when False clear reg_memory counters to 0.
When True maintain reg_memory counters, when False clear reg_memory counters to 0.
. reg_dump_done_R
True when all blocks in current dump have been read. False when dumping is
disabled or still ongoing.
. reg_output_enable_RW
. reg_output_enable_RW
True : pass on dumped packets from ring to 10GbE output
True : pass on dumped packets from ring to 10GbE output
False : stop 10GbE output immediately, any packets that still arrive from the ring will
False : stop 10GbE output immediately, any packets that still arrive from the ring will
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@@ -657,15 +664,19 @@ Het is gewoon een json-bestandje dat je naast een databestand met alleen complex
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@@ -657,15 +664,19 @@ Het is gewoon een json-bestandje dat je naast een databestand met alleen complex
it is not possible to multiplex all signal inputs per controller word. Instead each
it is not possible to multiplex all signal inputs per controller word. Instead each
controller word should contain only write data from one signal input.
controller word should contain only write data from one signal input.
* Each burst of controller word also shoul contain write data from one signal input. The
* Each burst of controller word also should contain write data from one signal input. The
maximum burst size is 64 (= 2**7 - 1 = 63) controller words 64 * 512b / 8b = 4kB. Actual burst
maximum burst size is 64 (= 2**7 - 1 = 63) controller words 64 * 512b / 8b = 4kB. Actual burst
size can be between 1 and 63.
size can be between 1 and 63.
* Using burstcount = 1 yields 512b / 14b = 36 * 14b samples + 8b not used per controller word.
* Using burstcount = 1 yields 512b / 14b = 36 * 14b samples + 8b not used per controller word.
Burstcount > 4 is probably needed for sufficient efficiency.
Burstcount > 4 is probably needed for sufficient efficiency.
efficiency = n / (n + CAS + command latency) = n / (n + 1.5 + 9), n = burstcount for read
efficiency = n / (n + CAS + command latency) = n / (n + 1.5 + 9), n = burstcount for read
* Crossbar can use wr_channel (e.g. 4 bit) to create a mux for write data and read data.
Replace wr_fifo in io_ddr by wr_fifo_arr[] + wr mux.
Do one wr or rd at a time and wait for drv_done. For wr first set wr_channel put the
mux right, then apply drv_copi with wr_not_rd and burstbegin.
10) Planning
10) Planning
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@@ -708,4 +719,15 @@ Het is gewoon een json-bestandje dat je naast een databestand met alleen complex
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@@ -708,4 +719,15 @@ Het is gewoon een json-bestandje dat je naast een databestand met alleen complex
bandwidths. So for odd length filters the useful bandwidth is limited to
bandwidths. So for odd length filters the useful bandwidth is limited to
0 < w < π.
0 < w < π.
- https://en.wikipedia.org/wiki/Analytic_signal --> Smith, J.O. "Analytic Signals and Hilbert Transform Filters", in Mathematics of the Discrete Fourier Transform (DFT) with Audio Applications, Second Edition