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Commit 45a081e7 authored by Eric Kooistra's avatar Eric Kooistra
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Moved build_dir_sim and build_dir_synth keys from local hdllib.cfg to central hdltool.cfg

parent 7053afa9
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......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
$UNB/Firmware/modules/common/src/vhdl/common_pkg.vhd
$UNB/Firmware/modules/common/src/vhdl/common_str_pkg.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
src/vhdl/diag_pkg.vhd
$UNB/Firmware/modules/Lofar/diag/src/vhdl/diag_bypass.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
src/vhdl/diagnostics.vhd
$UNB/Firmware/modules/diagnostics/src/vhdl/diagnostics_reg.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_top_level_entity =
quartus_copy_files =
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
src/vhdl/dp_stream_pkg.vhd
src/vhdl/dp_example_dut.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
$UNB/Firmware/modules/mm/src/vhdl/mm_fields.vhd
$UNB/Firmware/modules/mm/tb/vhdl/mm_file_pkg.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim = io_ddr tech_ddr
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
modelsim_compile_ip_files =
$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
$UNB/Firmware/modules/Lofar/sens/src/vhdl/sens_ctrl.vhd
$UNB/Firmware/modules/Lofar/sens/src/vhdl/sens.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
$UNB/Firmware/modules/Lofar/ss/src/vhdl/ss_store.vhd
$UNB/Firmware/modules/Lofar/ss/src/vhdl/ss_retrieve.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
$UNB/Firmware/modules/Lofar/tst/src/vhdl/tst_output.vhd
$UNB/Firmware/modules/Lofar/tst/src/vhdl/tst_input.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
$UNB/Firmware/modules/uth/src/vhdl/uth_pkg.vhd
$UNB/Firmware/modules/uth/src/vhdl/uth_tx.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
$UNB/Firmware/modules/easics/src/vhdl/PCK_CRC64_D8.vhd
$UNB/Firmware/modules/easics/src/vhdl/PCK_CRC64_D16.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
test_bench_files =
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
modelsim_compile_ip_files =
$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
$RADIOHDL/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
modelsim_compile_ip_files =
$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
#$RADIOHDL/libraries/io/ddr3/src/tcl/compile_ip.tcl
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
src/vhdl/epcs_reg.vhd
src/vhdl/mms_epcs.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
src/vhdl/eth_pkg.vhd
$UNB/Firmware/modules/tse/src/vhdl/eth_checksum.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
$UNB/Firmware/modules/Lofar/i2c/src/vhdl/i2c_pkg.vhd
$UNB/Firmware/modules/Lofar/i2c/src/vhdl/i2c_bit.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
io_mac_10g.vhd
......
......@@ -5,9 +5,6 @@ hdl_lib_uses_sim =
hdl_lib_technology =
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
synth_files =
$UNB/Firmware/modules/Lofar/mdio/src/vhdl/mdio_pkg.vhd
$UNB/Firmware/modules/Lofar/mdio/src/vhdl/mdio_mm.vhd
......
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