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HDL
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RTSD
HDL
Commits
42c8659c
Commit
42c8659c
authored
7 years ago
by
Pieter Donker
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aanpassing tb_beamfomer
parent
3b76f7c5
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libraries/dsp/beamformer/tb/vhdl/tb_beamformer.vhd
+6
-3
6 additions, 3 deletions
libraries/dsp/beamformer/tb/vhdl/tb_beamformer.vhd
with
6 additions
and
3 deletions
libraries/dsp/beamformer/tb/vhdl/tb_beamformer.vhd
+
6
−
3
View file @
42c8659c
...
@@ -124,6 +124,7 @@ BEGIN
...
@@ -124,6 +124,7 @@ BEGIN
proc_common_wait_until_low
(
dp_clk
,
dp_rst
);
proc_common_wait_until_low
(
dp_clk
,
dp_rst
);
proc_common_wait_some_cycles
(
dp_clk
,
10
);
proc_common_wait_some_cycles
(
dp_clk
,
10
);
REPORT
"Start mm stumulus"
;
FOR
I
IN
0
TO
g_nof_inputs
-1
LOOP
FOR
I
IN
0
TO
g_nof_inputs
-1
LOOP
FOR
J
IN
0
TO
g_nof_weights
-1
LOOP
FOR
J
IN
0
TO
g_nof_weights
-1
LOOP
-- write MM page
-- write MM page
...
@@ -146,15 +147,17 @@ BEGIN
...
@@ -146,15 +147,17 @@ BEGIN
END
LOOP
;
END
LOOP
;
verify_sum_en
<=
'1'
;
verify_sum_en
<=
'1'
;
END
IF
;
END
IF
;
verify_mm_en
<=
'0'
;
WAIT
;
END
PROCESS
;
END
PROCESS
;
stimulus
:
PROCESS
weights_addr_
stimulus
:
PROCESS
BEGIN
BEGIN
proc_common_wait_until_high
(
dp_clk
,
verify_sum_en
);
proc_common_wait_until_high
(
dp_clk
,
verify_sum_en
);
REPORT
"Start weights addr stimulus"
;
-- loop over all weights adresses
-- loop over all weights adresses
FOR
i
IN
0
TO
g_nof_weights
-1
LOOP
FOR
i
IN
0
TO
g_nof_weights
-1
LOOP
REPORT
"Start weights addr stimulus for weight "
&
int_to_str
(
i
);
beamformer_weight_addr
<=
STD_LOGIC_VECTOR
(
TO_UNSIGNED
(
i
,
ceil_log2
(
g_nof_weights
)));
beamformer_weight_addr
<=
STD_LOGIC_VECTOR
(
TO_UNSIGNED
(
i
,
ceil_log2
(
g_nof_weights
)));
WAIT
FOR
c_stimulus_period
;
WAIT
FOR
c_stimulus_period
;
proc_common_wait_until_high
(
dp_clk
,
beamformer_src_out
.
valid
);
proc_common_wait_until_high
(
dp_clk
,
beamformer_src_out
.
valid
);
...
@@ -201,7 +204,7 @@ BEGIN
...
@@ -201,7 +204,7 @@ BEGIN
-----------------------------------------------------------------------------
-----------------------------------------------------------------------------
u_mm_file_ram_beamformer
:
ENTITY
mm_lib
.
mm_file
GENERIC
MAP
(
c_mm_file_ram_beamformer
)
PORT
MAP
(
mm_rst
,
mm_clk
,
ram_beamformer_mosi
,
ram_beamformer_miso
);
u_mm_file_ram_beamformer
:
ENTITY
mm_lib
.
mm_file
GENERIC
MAP
(
c_mm_file_ram_beamformer
)
PORT
MAP
(
mm_rst
,
mm_clk
,
ram_beamformer_mosi
,
ram_beamformer_miso
);
gen_
arts_tab_
beamformer_snk_in_arr
:
FOR
i
IN
0
TO
g_nof_inputs
-1
GENERATE
gen_beamformer_snk_in_arr
:
FOR
i
IN
0
TO
g_nof_inputs
-1
GENERATE
beamformer_snk_in_arr
(
i
)
<=
block_gen_src_out_arr
(
0
);
-- Copy the block gen stream 'g_nof_inputs' times
beamformer_snk_in_arr
(
i
)
<=
block_gen_src_out_arr
(
0
);
-- Copy the block gen stream 'g_nof_inputs' times
END
GENERATE
;
END
GENERATE
;
...
...
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