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4121c2d4 · Reinier van der Walle · 01a85c6a · 4121c2d4
Commit 4121c2d4 authored 3 years ago by Reinier van der Walle
--- a/libraries/base/dp/src/vhdl/mmp_dp_bsn_align_v2.vhd
+++ b/libraries/base/dp/src/vhdl/mmp_dp_bsn_align_v2.vhd
@@ -122,7 +122,7 @@ BEGIN
    g_cross_clock_domain   => TRUE,
    g_readback             => FALSE,
    g_reg                  => c_mm_reg,
-    g_init_reg             => (OTHERS => '1')
+    g_init_reg             => (OTHERS => '1') -- Default all g_nof_streams are enabled.
  )
  PORT MAP (
    -- Clocks and reset