Merge branch 'L2SDP-551' into 'master'

Resolve L2SDP-551

Closes L2SDP-551

See merge request desp/hdl!179

applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd

@@ -108,26 +108,28 @@ ARCHITECTURE str OF sdp_statistics_offload IS
   CONSTANT c_mm_data_size              : NATURAL := func_sdp_get_stat_from_mm_data_size(g_statistics_type);
   CONSTANT c_mm_step_size              : NATURAL := func_sdp_get_stat_from_mm_step_size(g_statistics_type);
   CONSTANT c_mm_nof_data               : NATURAL := func_sdp_get_stat_from_mm_nof_data(g_statistics_type);
+  CONSTANT c_mm_ram_size               : NATURAL := c_mm_nof_data * c_mm_data_size * c_nof_packets_max;
 
   -- offload control
   TYPE t_reg IS RECORD
-    packet_count         : NATURAL;
-    start_address        : NATURAL;
+    packet_count         : NATURAL RANGE 0 TO c_nof_packets_max;
+    start_address        : NATURAL RANGE 0 TO c_mm_ram_size;
     start_pulse          : STD_LOGIC;
     dp_header_info       : STD_LOGIC_VECTOR(1023 DOWNTO 0);
     payload_err          : STD_LOGIC;
     in_sop_cnt           : NATURAL;
     integration_interval : NATURAL;
     interleave_count     : NATURAL RANGE 0 TO c_sdp_Q_fft;
+    interleave_address   : NATURAL RANGE 0 TO c_mm_ram_size;
     crosslet_count       : NATURAL RANGE 0 TO c_sdp_N_crosslets_max;
     instance_count       : NATURAL RANGE 0 TO c_sdp_P_sq;
-    instance_address     : NATURAL;
+    instance_address     : NATURAL RANGE 0 TO c_mm_ram_size;
     nof_crosslets        : NATURAL RANGE 0 TO c_sdp_N_crosslets_max;
     crosslets_info_rec   : t_sdp_crosslets_info;
   END RECORD;
 
   CONSTANT c_crosslets_info_rst : t_sdp_crosslets_info := (offset_arr => (OTHERS => 0), step => 0);
-  CONSTANT c_reg_rst            : t_reg := (0, 0, '0', (OTHERS => '0'), '0', 0, 0, 0, 0, 0, 0, 0, c_crosslets_info_rst);
+  CONSTANT c_reg_rst            : t_reg := (0, 0, '0', (OTHERS => '0'), '0', 0, 0, 0, 0, 0, 0, 0, 0, c_crosslets_info_rst);
 
   SIGNAL r     : t_reg;
   SIGNAL nxt_r : t_reg;
@@ -158,6 +160,18 @@ ARCHITECTURE str OF sdp_statistics_offload IS
   SIGNAL bsn_at_sync              : STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
   SIGNAL dp_header_info           : STD_LOGIC_VECTOR(1023 DOWNTO 0):= (OTHERS => '0');
 
+  -- Debug signals for view in Wave window
+  SIGNAL dbg_c_marker                    : NATURAL := c_marker;
+  SIGNAL dbg_c_nof_signal_inputs         : NATURAL := c_nof_signal_inputs;
+  SIGNAL dbg_c_nof_statistics_per_packet : NATURAL := c_nof_statistics_per_packet;
+  SIGNAL dbg_c_udp_total_length          : NATURAL := c_udp_total_length;
+  SIGNAL dbg_c_ip_total_length           : NATURAL := c_ip_total_length;
+  SIGNAL dbg_c_nof_packets_max           : NATURAL := c_nof_packets_max;
+  SIGNAL dbg_c_beamlet_id                : NATURAL := c_beamlet_id;
+  SIGNAL dbg_c_mm_data_size              : NATURAL := c_mm_data_size;
+  SIGNAL dbg_c_mm_step_size              : NATURAL := c_mm_step_size;
+  SIGNAL dbg_c_mm_nof_data               : NATURAL := c_mm_nof_data;
+
 BEGIN
 
   bsn_at_sync <= RESIZE_UVEC(in_sosi.bsn, 64) WHEN rising_edge(dp_clk) AND in_sosi.sync = '1';
@@ -286,13 +300,14 @@ BEGIN
     -- Issue start_pulse per packet offload
     IF trigger_offload = '1' THEN
       -- Use trigger_offload to start first packet offload, all g_statistics_type start from start address 0
-      v.start_pulse      := '1';
-      v.start_address    := 0;
-      v.packet_count     := 0;
-      v.interleave_count := 0;  -- only used for SST
-      v.crosslet_count   := 0;  -- only used for XST
-      v.instance_count   := 0;  -- only used for XST
-      v.instance_address := 0;  -- only used for XST
+      v.start_pulse        := '1';
+      v.start_address      := 0;
+      v.packet_count       := 0;
+      v.interleave_count   := 0;  -- only used for SST
+      v.interleave_address := 0;  -- only used for SST
+      v.crosslet_count     := 0;  -- only used for XST
+      v.instance_count     := 0;  -- only used for XST
+      v.instance_address   := 0;  -- only used for XST
 
     ELSIF mm_done = '1' THEN
       -- Use mm_done to start next packets offloads.
@@ -303,8 +318,10 @@ BEGIN
           v.start_address := r.start_address + c_mm_data_size;  -- default step to next packet in this step
           v.interleave_count := r.interleave_count + 1;
           IF r.interleave_count = c_sdp_Q_fft - 1 THEN
-            v.start_address := r.packet_count * c_sdp_N_sub * c_sdp_Q_fft * c_sdp_W_statistic_sz;  -- jump to first packet for next step
+            -- jump to first packet for next step,
+            v.start_address := r.interleave_address + c_sdp_N_sub * c_sdp_Q_fft * c_sdp_W_statistic_sz;  -- = + 512 * 2 * 2 = + 2048
             v.interleave_count := 0;
+            v.interleave_address := v.start_address;
           END IF;
           v.start_pulse := '1';
           v.packet_count := r.packet_count + 1;

applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd

@@ -139,10 +139,11 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
   SIGNAL in_crosslets_info_rec   : t_sdp_crosslets_info;
   SIGNAL in_crosslets_info_slv   : STD_LOGIC_VECTOR(c_sdp_crosslets_info_reg_w-1 DOWNTO 0);
 
-  SIGNAL offload_data            : STD_LOGIC_VECTOR(31 DOWNTO 0);
+  SIGNAL offload_data            : STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0);  -- 32 bit
   SIGNAL offload_sosi            : t_dp_sosi;
   SIGNAL offload_siso            : t_dp_siso := c_dp_siso_rst;
 
+  SIGNAL test_offload_data       : STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0);  -- 32 bit
   SIGNAL test_offload_sosi       : t_dp_sosi := c_dp_sosi_rst;
   SIGNAL test_offload_en         : STD_LOGIC := '0';
   SIGNAL test_offload_sop_cnt    : NATURAL;
@@ -577,6 +578,7 @@ BEGIN
   ASSERT c_crosslets_info_rec = func_sdp_map_crosslets_info(c_crosslets_info_slv) REPORT "Error in func_sdp_map_crosslets_info()" SEVERITY FAILURE;
 
   -- To view the 32 bit 1GbE offload data more easily in the Wave window
-  offload_data <= offload_sosi.data(31 DOWNTO 0);
+  offload_data <= offload_sosi.data(c_word_w-1 DOWNTO 0);
+  test_offload_data <= test_offload_sosi.data(c_word_w-1 DOWNTO 0);
 
 END tb;

libraries/base/dp/src/vhdl/dp_block_from_mm_dc.vhd

@@ -62,9 +62,11 @@ ARCHITECTURE str OF dp_block_from_mm_dc IS
   CONSTANT c_packet_size  : NATURAL := g_nof_data * g_data_size;  -- 512 * 2 = 1024 words.
   CONSTANT c_fifo_size    : NATURAL := c_packet_size * 2;
   CONSTANT c_start_addr_w : NATURAL := c_natural_w;
+  CONSTANT c_delay_len    : NATURAL := c_meta_delay_len;
 
   SIGNAL mm_fifo_sosi         : t_dp_sosi := c_dp_sosi_rst;
   SIGNAL mm_fifo_siso         : t_dp_siso;
+  SIGNAL start_pulse_dly      : STD_LOGIC_VECTOR(0 TO c_delay_len) := (OTHERS => '0');
   SIGNAL mm_start_pulse       : STD_LOGIC := '0';
   SIGNAL mm_done              : STD_LOGIC := '0';
   SIGNAL start_address_slv    : STD_LOGIC_VECTOR(c_start_addr_w-1 DOWNTO 0) := (OTHERS => '0');
@@ -72,18 +74,22 @@ ARCHITECTURE str OF dp_block_from_mm_dc IS
   SIGNAL mm_start_address     : NATURAL := 0;
 
 BEGIN
-  
-  p_common_spulse_start_pulse : ENTITY common_lib.common_spulse
+  -- Use start_pulse_dly to make sure mm_start_address_slv is stable before
+  -- mm_start_pulse, also when mm_clk is faster than dp_clk (e.g. in sim).
+  start_pulse_dly(0) <= start_pulse;
+  start_pulse_dly(1 TO c_delay_len) <= start_pulse_dly(0 TO c_delay_len-1) WHEN rising_edge(dp_clk);
+
+  u_common_spulse_start_pulse : ENTITY common_lib.common_spulse
   PORT MAP (
     in_rst      => dp_rst,
     in_clk      => dp_clk,
-    in_pulse    => start_pulse,
+    in_pulse    => start_pulse_dly(c_delay_len),
     out_rst     => mm_rst,
     out_clk     => mm_clk,
     out_pulse   => mm_start_pulse
   );
 
-  p_common_spulse_mm_done : ENTITY common_lib.common_spulse
+  u_common_spulse_mm_done : ENTITY common_lib.common_spulse
   PORT MAP (
     in_rst      => mm_rst,
     in_clk      => mm_clk,
@@ -96,7 +102,10 @@ BEGIN
   start_address_slv <= TO_UVEC(start_address, c_start_addr_w);
   mm_start_address <= TO_UINT(mm_start_address_slv);
 
-  p_common_async_slv_start_address : ENTITY common_lib.common_async_slv
+  u_common_async_slv_start_address : ENTITY common_lib.common_async_slv
+  GENERIC MAP (
+    g_delay_len => c_meta_delay_len
+  )
   PORT MAP (
     rst  => dp_rst,
     clk  => dp_clk,
@@ -104,7 +113,7 @@ BEGIN
     dout => mm_start_address_slv
   );
 
-  p_dp_fifo_fill_eop : ENTITY work.dp_fifo_fill_eop
+  u_dp_fifo_fill_eop : ENTITY work.dp_fifo_fill_eop
   GENERIC MAP (
     g_use_dual_clock => TRUE,
     g_data_w         => c_word_w,
@@ -124,7 +133,7 @@ BEGIN
     src_in      => out_siso
   );
 
-  p_dp_block_from_mm : ENTITY work.dp_block_from_mm
+  u_dp_block_from_mm : ENTITY work.dp_block_from_mm
   GENERIC MAP (
     g_data_size          => g_data_size,
     g_step_size          => g_step_size,