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Commit 3eb322c4 authored by Reinier van der Walle's avatar Reinier van der Walle
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Removed modelsim error by excluding the remote_update and asmi_parallel

in VHDL
parent 0705e430
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1 merge request!303Removed modelsim error by excluding the remote_update and asmi_parallel
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This commit is part of merge request !303. Comments created here will be created in the context of that merge request.
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with 16 additions and 21 deletions
...@@ -7,9 +7,9 @@ hdl_lib_uses_synth = technology ...@@ -7,9 +7,9 @@ hdl_lib_uses_synth = technology
ip_arria10_e3sge3_asmi_parallel ip_arria10_e3sge3_asmi_parallel
ip_arria10_e3sge3_remote_update ip_arria10_e3sge3_remote_update
ip_arria10_e1sg_asmi_parallel # modelsim crashes when asmi_parallel ip is used(segmentation violation) ip_arria10_e1sg_asmi_parallel # modelsim crashes when asmi_parallel ip is used(segmentation violation)
ip_arria10_e1sg_remote_update ip_arria10_e1sg_remote_update # modelsim crashes when asmi_parallel ip is used(segmentation violation)
ip_arria10_e2sg_asmi_parallel ip_arria10_e2sg_asmi_parallel # modelsim crashes when asmi_parallel ip is used(segmentation violation)
ip_arria10_e2sg_remote_update ip_arria10_e2sg_remote_update # modelsim crashes when asmi_parallel ip is used(segmentation violation)
hdl_lib_uses_sim = hdl_lib_uses_sim =
hdl_lib_technology = hdl_lib_technology =
hdl_lib_disclose_library_clause_names = hdl_lib_disclose_library_clause_names =
...@@ -26,8 +26,8 @@ hdl_lib_disclose_library_clause_names = ...@@ -26,8 +26,8 @@ hdl_lib_disclose_library_clause_names =
synth_files = synth_files =
tech_flash_component_pkg.vhd tech_flash_component_pkg.vhd
tech_flash_asmi_parallel.vhd #e1sg component is not instantiated in simulation tech_flash_asmi_parallel.vhd #e1sg,e2sg component is not instantiated in simulation
tech_flash_remote_update.vhd tech_flash_remote_update.vhd #e1sg,e2sg component is not instantiated in simulation
test_bench_files = test_bench_files =
......
...@@ -32,7 +32,7 @@ LIBRARY ip_stratixiv_flash_lib; ...@@ -32,7 +32,7 @@ LIBRARY ip_stratixiv_flash_lib;
LIBRARY ip_arria10_asmi_parallel_altera_asmi_parallel_150; LIBRARY ip_arria10_asmi_parallel_altera_asmi_parallel_150;
LIBRARY ip_arria10_e3sge3_asmi_parallel_altera_asmi_parallel_151; LIBRARY ip_arria10_e3sge3_asmi_parallel_altera_asmi_parallel_151;
--LIBRARY ip_arria10_e1sg_asmi_parallel_altera_asmi_parallel_180; --LIBRARY ip_arria10_e1sg_asmi_parallel_altera_asmi_parallel_180;
LIBRARY ip_arria10_e2sg_asmi_parallel_altera_asmi_parallel_1910; --LIBRARY ip_arria10_e2sg_asmi_parallel_altera_asmi_parallel_1910;
ENTITY tech_flash_asmi_parallel IS ENTITY tech_flash_asmi_parallel IS
GENERIC ( GENERIC (
......
...@@ -31,8 +31,8 @@ USE technology_lib.technology_select_pkg.ALL; ...@@ -31,8 +31,8 @@ USE technology_lib.technology_select_pkg.ALL;
LIBRARY ip_stratixiv_flash_lib; LIBRARY ip_stratixiv_flash_lib;
LIBRARY ip_arria10_remote_update_altera_remote_update_150; LIBRARY ip_arria10_remote_update_altera_remote_update_150;
LIBRARY ip_arria10_e3sge3_remote_update_altera_remote_update_151; LIBRARY ip_arria10_e3sge3_remote_update_altera_remote_update_151;
LIBRARY ip_arria10_e1sg_remote_update_altera_remote_update_180; --LIBRARY ip_arria10_e1sg_remote_update_altera_remote_update_180;
LIBRARY ip_arria10_e2sg_remote_update_altera_remote_update_1910; --LIBRARY ip_arria10_e2sg_remote_update_altera_remote_update_1910;
ENTITY tech_flash_remote_update IS ENTITY tech_flash_remote_update IS
GENERIC ( GENERIC (
......
hdl_lib_name = ip_arria10_e2sg_altera_asmi_parallel_1910 hdl_lib_name = ip_arria10_e2sg_altera_asmi_parallel_1910
# Note, this library causes modelsim to crash!
hdl_library_clause_name = altera_asmi_parallel_1910 hdl_library_clause_name = altera_asmi_parallel_1910
hdl_lib_uses_synth = hdl_lib_uses_synth =
hdl_lib_uses_sim = hdl_lib_uses_sim =
......
...@@ -26,7 +26,7 @@ ...@@ -26,7 +26,7 @@
# - replace QSYS_SIMDIR by IP_DIR # - replace QSYS_SIMDIR by IP_DIR
# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files. # - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
#vlib ./work/ ;# Assume library work already exist vlib ./work/ ;# Assume library work already exist
set IP_DIR "$env(HDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_remote_update/sim" set IP_DIR "$env(HDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_remote_update/sim"
......
hdl_lib_name = ip_arria10_e2sg_altera_remote_update_1910 hdl_lib_name = ip_arria10_e2sg_altera_remote_update_1910
# Note, this library causes modelsim to crash!
hdl_library_clause_name = altera_remote_update_1910 hdl_library_clause_name = altera_remote_update_1910
hdl_lib_uses_synth = hdl_lib_uses_synth =
hdl_lib_uses_sim = ip_arria10_e2sg_altera_remote_update_core_1910 hdl_lib_uses_sim = ip_arria10_e2sg_altera_remote_update_core_1910
......
...@@ -26,7 +26,7 @@ ...@@ -26,7 +26,7 @@
# - replace QSYS_SIMDIR by IP_DIR # - replace QSYS_SIMDIR by IP_DIR
# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files. # - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
#vlib ./work/ ;# Assume library work already exist vlib ./work/ ;# Assume library work already exist
set IP_DIR "$env(HDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_remote_update/sim" set IP_DIR "$env(HDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_remote_update/sim"
......
...@@ -26,10 +26,7 @@ ...@@ -26,10 +26,7 @@
# - replace QSYS_SIMDIR by IP_DIR # - replace QSYS_SIMDIR by IP_DIR
# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files. # - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
vlib ./work/ ;# Assume library work already exist #vlib ./work/ ;# Assume library work already exist
set IP_DIR "$env(HDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_asmi_parallel/sim" set IP_DIR "$env(HDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_asmi_parallel/sim"
vcom "$IP_DIR/ip_arria10_e2sg_asmi_parallel.vhd"
vcom "$IP_DIR/ip_arria10_e2sg_asmi_parallel.vhd"
hdl_lib_name = ip_arria10_e2sg_asmi_parallel hdl_lib_name = ip_arria10_e2sg_asmi_parallel
hdl_library_clause_name = ip_arria10_e2sg_asmi_parallel_altera_asmi_parallel_1910 hdl_library_clause_name = ip_arria10_e2sg_asmi_parallel_altera_asmi_parallel_1910
hdl_lib_uses_synth = hdl_lib_uses_synth =
hdl_lib_uses_sim = hdl_lib_uses_sim = ip_arria10_e2sg_altera_asmi_parallel_1910
# Do not use this simulation library: it causes Modelsim to crash:
#ip_arria10_e2sg_altera_asmi_parallel_1910
hdl_lib_technology = ip_arria10_e2sg hdl_lib_technology = ip_arria10_e2sg
synth_files = synth_files =
......
hdl_lib_name = ip_arria10_e2sg_remote_update hdl_lib_name = ip_arria10_e2sg_remote_update
hdl_library_clause_name = ip_arria10_e2sg_remote_update_altera_remote_update_1910 hdl_library_clause_name = ip_arria10_e2sg_remote_update_altera_remote_update_1910
hdl_lib_uses_synth = hdl_lib_uses_synth =
hdl_lib_uses_sim = hdl_lib_uses_sim = ip_arria10_e2sg_altera_remote_update_1910
# Do not use this simulation library: it causes Modelsim to crash:
#ip_arria10_e2sg_altera_remote_update_1910
hdl_lib_technology = ip_arria10_e2sg hdl_lib_technology = ip_arria10_e2sg
synth_files = synth_files =
......
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