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RTSD
HDL
Commits
3e44ef8e
Commit
3e44ef8e
authored
3 years ago
by
Pieter Donker
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Merge branch '
L2SDP-360
' into 'master'
Resolve
L2SDP-360
Closes
L2SDP-360
See merge request desp/hdl!109
parents
8a9f147b
19466f1d
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No related tags found
1 merge request
!109
Resolve L2SDP-360
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2
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applications/lofar2/designs/lofar2_unb2b_beamformer/lofar2_unb2b_beamformer.mmap.gold
+455
-454
455 additions, 454 deletions
...lofar2_unb2b_beamformer/lofar2_unb2b_beamformer.mmap.gold
libraries/base/diag/diag.peripheral.yaml
+2
-0
2 additions, 0 deletions
libraries/base/diag/diag.peripheral.yaml
with
457 additions
and
454 deletions
applications/lofar2/designs/lofar2_unb2b_beamformer/lofar2_unb2b_beamformer.mmap.gold
+
455
−
454
View file @
3e44ef8e
fpga_name = lofar2_unb2b_beamformer
fpga_name = lofar2_unb2b_beamformer
number_of_columns = 1
1
number_of_columns = 1
3
# There can be multiple lines with a single key. The host should ignore unknown keys.
# There can be multiple lines with a single key. The host should ignore unknown keys.
# The lines with columns follow after the number_of_columns keys. The host should ignore
# The lines with columns follow after the number_of_columns keys. The host should ignore
# the extra columns in case the mmap contains more columns than the host expects.
# the extra columns in case the mmap contains more columns than the host expects.
...
@@ -15,457 +15,458 @@ number_of_columns = 11
...
@@ -15,457 +15,458 @@ number_of_columns = 11
# col 9: field radix, if - then it is part of previous field_name.
# col 9: field radix, if - then it is part of previous field_name.
# col 10: field mm_mask
# col 10: field mm_mask
# col 11: field user_mask, if - then it is same as mm_mask
# col 11: field user_mask, if - then it is same as mm_mask
# col 12: number of peripherals span, if - then not used
# col 13: number of mm_ports span, if - then not used
#
#
# col1 col2 col3 col4 col5 col6 col7 col8 col9 col10 col11
# col1 col2 col3 col4 col5 col6 col7 col8 col9 col10 col11 col12 col13
# ------------------------ ---- ---- ----- ---------------------------------------- ---------- ------ ----- ----------- ---------- ----------
# ------------------------ ---- ---- ----- ---------------------------------------- ---------- ------ ----- ----------- ---------- ---------- ----- -----
ROM_SYSTEM_INFO 1 1 RAM data 0x00000000 32768 RO char8 b[31:0] b[7:0]
ROM_SYSTEM_INFO 1 1 RAM data 0x00000000 32768 RO char8 b[31:0] b[7:0] - -
PIO_SYSTEM_INFO 1 1 REG info 0x00008000 1 RO uint32 b[31:0] -
PIO_SYSTEM_INFO 1 1 REG info 0x00008000 1 RO uint32 b[31:0] - - -
- - - - info_gn_index 0x00008000 1 RO uint32 b[7:0] -
- - - - info_gn_index 0x00008000 1 RO uint32 b[7:0] - - -
- - - - info_hw_version 0x00008000 1 RO uint32 b[9:8] -
- - - - info_hw_version 0x00008000 1 RO uint32 b[9:8] - - -
- - - - info_cs_sim 0x00008000 1 RO uint32 b[10:10] -
- - - - info_cs_sim 0x00008000 1 RO uint32 b[10:10] - - -
- - - - info_fw_version_major 0x00008000 1 RO uint32 b[19:16] -
- - - - info_fw_version_major 0x00008000 1 RO uint32 b[19:16] - - -
- - - - info_fw_version_minor 0x00008000 1 RO uint32 b[23:20] -
- - - - info_fw_version_minor 0x00008000 1 RO uint32 b[23:20] - - -
- - - - info_rom_version 0x00008000 1 RO uint32 b[26:24] -
- - - - info_rom_version 0x00008000 1 RO uint32 b[26:24] - - -
- - - - info_technology 0x00008000 1 RO uint32 b[31:27] -
- - - - info_technology 0x00008000 1 RO uint32 b[31:27] - - -
- - - - use_phy 0x00008001 1 RO uint32 b[7:0] -
- - - - use_phy 0x00008001 1 RO uint32 b[7:0] - - -
- - - - design_name 0x00008002 52 RO char8 b[31:0] b[7:0]
- - - - design_name 0x00008002 52 RO char8 b[31:0] b[7:0] - -
- - - - stamp_date 0x0000800f 1 RO uint32 b[31:0] -
- - - - stamp_date 0x0000800f 1 RO uint32 b[31:0] - - -
- - - - stamp_time 0x00008010 1 RO uint32 b[31:0] -
- - - - stamp_time 0x00008010 1 RO uint32 b[31:0] - - -
- - - - stamp_commit 0x00008011 3 RO uint32 b[31:0] -
- - - - stamp_commit 0x00008011 3 RO uint32 b[31:0] - - -
- - - - design_note 0x00008014 52 RO char8 b[31:0] b[7:0]
- - - - design_note 0x00008014 52 RO char8 b[31:0] b[7:0] - -
REG_WDI 1 1 REG wdi_override 0x0000a000 1 WO uint32 b[31:0] -
REG_WDI 1 1 REG wdi_override 0x0000a000 1 WO uint32 b[31:0] - - -
REG_FPGA_TEMP_SENS 1 1 REG temp 0x0000c000 1 RO uint32 b[31:0] -
REG_FPGA_TEMP_SENS 1 1 REG temp 0x0000c000 1 RO uint32 b[31:0] - - -
REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0000c000 6 RO uint32 b[31:0] -
REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0000c000 6 RO uint32 b[31:0] - - -
RAM_SCRAP 1 1 RAM data 0x0000e000 512 RW uint32 b[31:0] -
RAM_SCRAP 1 1 RAM data 0x0000e000 512 RW uint32 b[31:0] - - -
AVS_ETH_0_TSE 1 1 REG status 0x00010000 1024 RO uint32 b[31:0] -
AVS_ETH_0_TSE 1 1 REG status 0x00010000 1024 RO uint32 b[31:0] - - -
AVS_ETH_0_REG 1 1 REG status 0x00010000 12 RO uint32 b[31:0] -
AVS_ETH_0_REG 1 1 REG status 0x00010000 12 RO uint32 b[31:0] - - -
AVS_ETH_0_RAM 1 1 RAM data 0x00010400 1024 RW uint32 b[31:0] -
AVS_ETH_0_RAM 1 1 RAM data 0x00010400 1024 RW uint32 b[31:0] - - -
PIO_PPS 1 1 REG capture_cnt 0x00012000 1 RO uint32 b[29:0] -
PIO_PPS 1 1 REG capture_cnt 0x00012000 1 RO uint32 b[29:0] - - -
- - - - stable 0x00012000 1 RO uint32 b[30:30] -
- - - - stable 0x00012000 1 RO uint32 b[30:30] - - -
- - - - toggle 0x00012000 1 RO uint32 b[31:31] -
- - - - toggle 0x00012000 1 RO uint32 b[31:31] - - -
- - - - expected_cnt 0x00012001 1 RW uint32 b[27:0] -
- - - - expected_cnt 0x00012001 1 RW uint32 b[27:0] - - -
- - - - edge 0x00012001 1 RW uint32 b[31:31] -
- - - - edge 0x00012001 1 RW uint32 b[31:31] - - -
- - - - offset_cnt 0x00012002 1 RO uint32 b[27:0] -
- - - - offset_cnt 0x00012002 1 RO uint32 b[27:0] - - -
REG_EPCS 1 1 REG addr 0x00014000 1 WO uint32 b[23:0] -
REG_EPCS 1 1 REG addr 0x00014000 1 WO uint32 b[23:0] - - -
- - - - rden 0x00014001 1 WO uint32 b[0:0] -
- - - - rden 0x00014001 1 WO uint32 b[0:0] - - -
- - - - read_bit 0x00014002 1 WO uint32 b[0:0] -
- - - - read_bit 0x00014002 1 WO uint32 b[0:0] - - -
- - - - write_bit 0x00014003 1 WO uint32 b[0:0] -
- - - - write_bit 0x00014003 1 WO uint32 b[0:0] - - -
- - - - sector_erase 0x00014004 1 WO uint32 b[0:0] -
- - - - sector_erase 0x00014004 1 WO uint32 b[0:0] - - -
- - - - busy 0x00014005 1 RO uint32 b[0:0] -
- - - - busy 0x00014005 1 RO uint32 b[0:0] - - -
- - - - unprotect 0x00014006 1 WO uint32 b[31:0] -
- - - - unprotect 0x00014006 1 WO uint32 b[31:0] - - -
REG_DPMM_CTRL 1 1 REG rd_usedw 0x00016000 1 RO uint32 b[31:0] -
REG_DPMM_CTRL 1 1 REG rd_usedw 0x00016000 1 RO uint32 b[31:0] - - -
REG_DPMM_DATA 1 1 FIFO data 0x00016400 1 RO uint32 b[31:0] -
REG_DPMM_DATA 1 1 FIFO data 0x00016400 1 RO uint32 b[31:0] - - -
REG_MMDP_CTRL 1 1 REG wr_usedw 0x00018000 1 RO uint32 b[31:0] -
REG_MMDP_CTRL 1 1 REG wr_usedw 0x00018000 1 RO uint32 b[31:0] - - -
- - - - wr_availw 0x00018001 1 RO uint32 b[31:0] -
- - - - wr_availw 0x00018001 1 RO uint32 b[31:0] - - -
REG_MMDP_DATA 1 1 FIFO data 0x00018400 1 WO uint32 b[31:0] -
REG_MMDP_DATA 1 1 FIFO data 0x00018400 1 WO uint32 b[31:0] - - -
REG_REMU 1 1 REG reconfigure 0x0001a000 1 WO uint32 b[31:0] -
REG_REMU 1 1 REG reconfigure 0x0001a000 1 WO uint32 b[31:0] - - -
- - - - param 0x0001a001 1 WO uint32 b[2:0] -
- - - - param 0x0001a001 1 WO uint32 b[2:0] - - -
- - - - read_param 0x0001a002 1 WO uint32 b[0:0] -
- - - - read_param 0x0001a002 1 WO uint32 b[0:0] - - -
- - - - write_param 0x0001a003 1 WO uint32 b[0:0] -
- - - - write_param 0x0001a003 1 WO uint32 b[0:0] - - -
- - - - data_out 0x0001a004 1 RO uint32 b[23:0] -
- - - - data_out 0x0001a004 1 RO uint32 b[23:0] - - -
- - - - data_in 0x0001a005 1 WO uint32 b[23:0] -
- - - - data_in 0x0001a005 1 WO uint32 b[23:0] - - -
- - - - busy 0x0001a006 1 RO uint32 b[0:0] -
- - - - busy 0x0001a006 1 RO uint32 b[0:0] - - -
PIO_JESD_CTRL 1 1 REG enable 0x0001c000 1 RW uint32 b[30:0] -
PIO_JESD_CTRL 1 1 REG enable 0x0001c000 1 RW uint32 b[30:0] - - -
- - - - reset 0x0001c000 1 RW uint32 b[31:31] -
- - - - reset 0x0001c000 1 RW uint32 b[31:31] - - -
JESD204B 1 1 REG rx_dll_ctrl 0x0001e014 1 RW uint32 b[16:0] -
JESD204B 1 1 REG rx_dll_ctrl 0x0001e014 1 RW uint32 b[16:0] - - -
- - - - rx_syncn_sysref_ctrl 0x0001e015 1 RW uint32 b[24:0] -
- - - - rx_syncn_sysref_ctrl 0x0001e015 1 RW uint32 b[24:0] - - -
- - - - rx_csr_sysref_always_on 0x0001e015 1 RW uint32 b[1:1] -
- - - - rx_csr_sysref_always_on 0x0001e015 1 RW uint32 b[1:1] - - -
- - - - rx_csr_rbd_offset 0x0001e015 1 RW uint32 b[10:3] -
- - - - rx_csr_rbd_offset 0x0001e015 1 RW uint32 b[10:3] - - -
- - - - rx_csr_lmfc_offset 0x0001e015 1 RW uint32 b[19:12] -
- - - - rx_csr_lmfc_offset 0x0001e015 1 RW uint32 b[19:12] - - -
- - - - rx_err0 0x0001e018 1 RW uint32 b[8:0] -
- - - - rx_err0 0x0001e018 1 RW uint32 b[8:0] - - -
- - - - rx_err1 0x0001e019 1 RW uint32 b[9:0] -
- - - - rx_err1 0x0001e019 1 RW uint32 b[9:0] - - -
- - - - csr_dev_syncn 0x0001e020 1 RO uint32 b[0:0] -
- - - - csr_dev_syncn 0x0001e020 1 RO uint32 b[0:0] - - -
- - - - csr_rbd_count 0x0001e020 1 RO uint32 b[10:3] -
- - - - csr_rbd_count 0x0001e020 1 RO uint32 b[10:3] - - -
- - - - rx_status1 0x0001e021 1 RW uint32 b[23:0] -
- - - - rx_status1 0x0001e021 1 RW uint32 b[23:0] - - -
- - - - rx_status2 0x0001e022 1 RW uint32 b[23:0] -
- - - - rx_status2 0x0001e022 1 RW uint32 b[23:0] - - -
- - - - rx_status3 0x0001e023 1 RW uint32 b[7:0] -
- - - - rx_status3 0x0001e023 1 RW uint32 b[7:0] - - -
- - - - rx_ilas_csr_l 0x0001e025 1 RW uint32 b[4:0] -
- - - - rx_ilas_csr_l 0x0001e025 1 RW uint32 b[4:0] - - -
- - - - rx_ilas_csr_f 0x0001e025 1 RW uint32 b[15:8] -
- - - - rx_ilas_csr_f 0x0001e025 1 RW uint32 b[15:8] - - -
- - - - rx_ilas_csr_k 0x0001e025 1 RW uint32 b[20:16] -
- - - - rx_ilas_csr_k 0x0001e025 1 RW uint32 b[20:16] - - -
- - - - rx_ilas_csr_m 0x0001e025 1 RW uint32 b[31:24] -
- - - - rx_ilas_csr_m 0x0001e025 1 RW uint32 b[31:24] - - -
- - - - rx_ilas_csr_n 0x0001e026 1 RW uint32 b[4:0] -
- - - - rx_ilas_csr_n 0x0001e026 1 RW uint32 b[4:0] - - -
- - - - rx_ilas_csr_cs 0x0001e026 1 RW uint32 b[7:6] -
- - - - rx_ilas_csr_cs 0x0001e026 1 RW uint32 b[7:6] - - -
- - - - rx_ilas_csr_np 0x0001e026 1 RW uint32 b[12:8] -
- - - - rx_ilas_csr_np 0x0001e026 1 RW uint32 b[12:8] - - -
- - - - rx_ilas_csr_subclassv 0x0001e026 1 RW uint32 b[15:13] -
- - - - rx_ilas_csr_subclassv 0x0001e026 1 RW uint32 b[15:13] - - -
- - - - rx_ilas_csr_s 0x0001e026 1 RW uint32 b[20:16] -
- - - - rx_ilas_csr_s 0x0001e026 1 RW uint32 b[20:16] - - -
- - - - rx_ilas_csr_jesdv 0x0001e026 1 RW uint32 b[23:21] -
- - - - rx_ilas_csr_jesdv 0x0001e026 1 RW uint32 b[23:21] - - -
- - - - rx_ilas_csr_cf 0x0001e026 1 RW uint32 b[28:24] -
- - - - rx_ilas_csr_cf 0x0001e026 1 RW uint32 b[28:24] - - -
- - - - rx_ilas_csr_hd 0x0001e026 1 RW uint32 b[31:31] -
- - - - rx_ilas_csr_hd 0x0001e026 1 RW uint32 b[31:31] - - -
- - - - rx_status4 0x0001e03c 1 RW uint32 b[15:0] -
- - - - rx_status4 0x0001e03c 1 RW uint32 b[15:0] - - -
- - - - rx_status5 0x0001e03d 1 RW uint32 b[15:0] -
- - - - rx_status5 0x0001e03d 1 RW uint32 b[15:0] - - -
- - - - rx_status6 0x0001e03e 1 RW uint32 b[23:0] -
- - - - rx_status6 0x0001e03e 1 RW uint32 b[23:0] - - -
- - - - rx_status7 0x0001e03f 1 RO uint32 b[31:0] -
- - - - rx_status7 0x0001e03f 1 RO uint32 b[31:0] - - -
REG_DP_SHIFTRAM 1 12 REG shift 0x00020000 1 RW uint32 b[11:0] -
REG_DP_SHIFTRAM 1 12 REG shift 0x00020000 1 RW uint32 b[11:0] - 12 1
REG_BSN_SOURCE 1 1 REG dp_on 0x00022000 1 RW uint32 b[0:0] -
REG_BSN_SOURCE 1 1 REG dp_on 0x00022000 1 RW uint32 b[0:0] - - -
- - - - dp_on_pps 0x00022000 1 RW uint32 b[1:1] -
- - - - dp_on_pps 0x00022000 1 RW uint32 b[1:1] - - -
- - - - nof_block_per_sync 0x00022001 1 RW uint32 b[31:0] -
- - - - nof_block_per_sync 0x00022001 1 RW uint32 b[31:0] - - -
- - - - bsn 0x00022002 1 RW uint64 b[31:0] b[31:0]
- - - - bsn 0x00022002 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00022003 - - - b[31:0] b[63:32]
- - - - - 0x00022003 - - - b[31:0] b[63:32] - -
REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x00024000 1 RW uint64 b[31:0] b[31:0]
REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x00024000 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00024001 - - - b[31:0] b[63:32]
- - - - - 0x00024001 - - - b[31:0] b[63:32] - -
REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00026000 1 RO uint32 b[0:0] -
REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00026000 1 RO uint32 b[0:0] - - -
- - - - ready_stable 0x00026000 1 RO uint32 b[1:1] -
- - - - ready_stable 0x00026000 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00026000 1 RO uint32 b[2:2] -
- - - - sync_timeout 0x00026000 1 RO uint32 b[2:2] - - -
- - - - bsn_at_sync 0x00026001 1 RO uint64 b[31:0] b[31:0]
- - - - bsn_at_sync 0x00026001 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x00026002 - - - b[31:0] b[63:32]
- - - - - 0x00026002 - - - b[31:0] b[63:32] - -
- - - - nof_sop 0x00026003 1 RO uint32 b[31:0] -
- - - - nof_sop 0x00026003 1 RO uint32 b[31:0] - - -
- - - - nof_valid 0x00026004 1 RO uint32 b[31:0] -
- - - - nof_valid 0x00026004 1 RO uint32 b[31:0] - - -
- - - - nof_err 0x00026005 1 RO uint32 b[31:0] -
- - - - nof_err 0x00026005 1 RO uint32 b[31:0] - - -
- - - - bsn_first 0x00026006 1 RO uint64 b[31:0] b[31:0]
- - - - bsn_first 0x00026006 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x00026007 - - - b[31:0] b[63:32]
- - - - - 0x00026007 - - - b[31:0] b[63:32] - -
- - - - bsn_first_cycle_cnt 0x00026008 1 RO uint32 b[31:0] -
- - - - bsn_first_cycle_cnt 0x00026008 1 RO uint32 b[31:0] - - -
REG_DIAG_WG 1 12 REG mode 0x00028000 1 RW uint32 b[7:0] -
REG_DIAG_WG 1 12 REG mode 0x00028000 1 RW uint32 b[7:0] - 48 4
- - - - nof_samples 0x00028000 1 RW uint32 b[31:16] -
- - - - nof_samples 0x00028000 1 RW uint32 b[31:16] - - -
- - - - phase 0x00028001 1 RW uint32 b[15:0] -
- - - - phase 0x00028001 1 RW uint32 b[15:0] - - -
- - - - freq 0x00028002 1 RW uint32 b[30:0] -
- - - - freq 0x00028002 1 RW uint32 b[30:0] - - -
- - - - ampl 0x00028003 1 RW uint32 b[16:0] -
- - - - ampl 0x00028003 1 RW uint32 b[16:0] - - -
RAM_DIAG_WG 1 12 RAM data 0x0002c000 1024 RW uint32 b[17:0] -
RAM_DIAG_WG 1 12 RAM data 0x0002c000 1024 RW uint32 b[17:0] - 16384 1024
REG_ADUH_MON 1 12 REG mean_sum 0x00030000 1 RO int64 b[31:0] b[31:0]
REG_ADUH_MON 1 12 REG mean_sum 0x00030000 1 RO int64 b[31:0] b[31:0] 48 4
- - - - - 0x00030001 - - - b[31:0] b[63:32]
- - - - - 0x00030001 - - - b[31:0] b[63:32] - -
- - - - power_sum 0x00030002 1 RO int64 b[31:0] b[31:0]
- - - - power_sum 0x00030002 1 RO int64 b[31:0] b[31:0] - -
- - - - - 0x00030003 - - - b[31:0] b[63:32]
- - - - - 0x00030003 - - - b[31:0] b[63:32] - -
REG_DIAG_DATA_BUF_BSN 1 12 REG sync_cnt 0x00032000 1 RO uint32 b[31:0] -
REG_DIAG_DATA_BUF_BSN 1 12 REG sync_cnt 0x00032000 1 RO uint32 b[31:0] - 24 2
- - - - word_cnt 0x00032001 1 RO uint32 b[31:0] -
- - - - word_cnt 0x00032001 1 RO uint32 b[31:0] - - -
RAM_DIAG_DATA_BUF_BSN 1 12 RAM data 0x00034000 1024 RW uint32 b[15:0] -
RAM_DIAG_DATA_BUF_BSN 1 12 RAM data 0x00034000 1024 RW uint32 b[15:0] - 16384 1024
REG_SI 1 1 REG enable 0x00038000 1 RW uint32 b[0:0] -
REG_SI 1 1 REG enable 0x00038000 1 RW uint32 b[0:0] - - -
RAM_FIL_COEFS 1 16 RAM data 0x0003c000 1024 RW uint32 b[15:0] -
RAM_FIL_COEFS 1 16 RAM data 0x0003c000 1024 RW uint32 b[15:0] - 16384 1024
RAM_EQUALIZER_GAINS 1 6 RAM data 0x00040000 1024 RW cint16_ir b[31:0] -
RAM_EQUALIZER_GAINS 1 6 RAM data 0x00040000 1024 RW cint16_ir b[31:0] - 8192 1024
REG_DP_SELECTOR 1 1 REG input_select 0x00042000 1 RW uint32 b[0:0] -
REG_DP_SELECTOR 1 1 REG input_select 0x00042000 1 RW uint32 b[0:0] - - -
RAM_ST_SST 1 6 RAM data 0x00044000 2048 RW uint64 b[31:0] b[31:0]
RAM_ST_SST 1 6 RAM data 0x00044000 2048 RW uint64 b[31:0] b[31:0] 16384 2048
- - - - - 0x00042001 - - - b[21:0] b[53:32]
- - - - - 0x00042001 - - - b[21:0] b[53:32] - -
REG_STAT_ENABLE 1 1 REG enable 0x00048000 1 RW uint32 b[0:0] -
REG_STAT_ENABLE 1 1 REG enable 0x00048000 1 RW uint32 b[0:0] - - -
REG_STAT_HDR_INFO 1 1 REG bsn 0x0004a000 1 RW uint64 b[31:0] b[31:0]
REG_STAT_HDR_INFO 1 1 REG bsn 0x0004a000 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x0004a001 - - - b[31:0] b[63:32]
- - - - - 0x0004a001 - - - b[31:0] b[63:32] - -
- - - - sdp_block_period 0x0004a002 1 RW uint32 b[15:0] -
- - - - sdp_block_period 0x0004a002 1 RW uint32 b[15:0] - - -
- - - - sdp_nof_statistics_per_packet 0x0004a003 1 RW uint32 b[15:0] -
- - - - sdp_nof_statistics_per_packet 0x0004a003 1 RW uint32 b[15:0] - - -
- - - - sdp_nof_bytes_per_statistic 0x0004a004 1 RW uint32 b[7:0] -
- - - - sdp_nof_bytes_per_statistic 0x0004a004 1 RW uint32 b[7:0] - - -
- - - - sdp_nof_signal_inputs 0x0004a005 1 RW uint32 b[7:0] -
- - - - sdp_nof_signal_inputs 0x0004a005 1 RW uint32 b[7:0] - - -
- - - - sdp_data_id 0x0004a006 1 RW uint32 b[31:0] -
- - - - sdp_data_id 0x0004a006 1 RW uint32 b[31:0] - - -
- - - - sdp_data_id_sst_signal_input_index 0x0004a006 1 RW uint32 b[7:0] -
- - - - sdp_data_id_sst_signal_input_index 0x0004a006 1 RW uint32 b[7:0] - - -
- - - - sdp_data_id_sst_reserved 0x0004a006 1 RW uint32 b[31:8] -
- - - - sdp_data_id_sst_reserved 0x0004a006 1 RW uint32 b[31:8] - - -
- - - - sdp_integration_interval 0x0004a007 1 RW uint32 b[23:0] -
- - - - sdp_integration_interval 0x0004a007 1 RW uint32 b[23:0] - - -
- - - - sdp_reserved 0x0004a008 1 RW uint32 b[7:0] -
- - - - sdp_reserved 0x0004a008 1 RW uint32 b[7:0] - - -
- - - - sdp_source_info_gn_index 0x0004a009 1 RW uint32 b[4:0] -
- - - - sdp_source_info_gn_index 0x0004a009 1 RW uint32 b[4:0] - - -
- - - - sdp_source_info_reserved 0x0004a00a 1 RW uint32 b[7:5] -
- - - - sdp_source_info_reserved 0x0004a00a 1 RW uint32 b[7:5] - - -
- - - - sdp_source_info_subband_calibrated_flag 0x0004a00b 1 RW uint32 b[8:8] -
- - - - sdp_source_info_subband_calibrated_flag 0x0004a00b 1 RW uint32 b[8:8] - - -
- - - - sdp_source_info_beam_repositioning_flag 0x0004a00c 1 RW uint32 b[9:9] -
- - - - sdp_source_info_beam_repositioning_flag 0x0004a00c 1 RW uint32 b[9:9] - - -
- - - - sdp_source_info_payload_error 0x0004a00d 1 RW uint32 b[10:10] -
- - - - sdp_source_info_payload_error 0x0004a00d 1 RW uint32 b[10:10] - - -
- - - - sdp_source_info_fsub_type 0x0004a00e 1 RW uint32 b[11:11] -
- - - - sdp_source_info_fsub_type 0x0004a00e 1 RW uint32 b[11:11] - - -
- - - - sdp_source_info_f_adc 0x0004a00f 1 RW uint32 b[12:12] -
- - - - sdp_source_info_f_adc 0x0004a00f 1 RW uint32 b[12:12] - - -
- - - - sdp_source_info_nyquist_zone_index 0x0004a010 1 RW uint32 b[14:13] -
- - - - sdp_source_info_nyquist_zone_index 0x0004a010 1 RW uint32 b[14:13] - - -
- - - - sdp_source_info_antenna_band_index 0x0004a011 1 RW uint32 b[15:15] -
- - - - sdp_source_info_antenna_band_index 0x0004a011 1 RW uint32 b[15:15] - - -
- - - - sdp_station_id 0x0004a012 1 RW uint32 b[15:0] -
- - - - sdp_station_id 0x0004a012 1 RW uint32 b[15:0] - - -
- - - - sdp_observation_id 0x0004a013 1 RW uint32 b[31:0] -
- - - - sdp_observation_id 0x0004a013 1 RW uint32 b[31:0] - - -
- - - - sdp_version_id 0x0004a014 1 RO uint32 b[7:0] -
- - - - sdp_version_id 0x0004a014 1 RO uint32 b[7:0] - - -
- - - - sdp_marker 0x0004a015 1 RO uint32 b[7:0] -
- - - - sdp_marker 0x0004a015 1 RO uint32 b[7:0] - - -
- - - - udp_checksum 0x0004a016 1 RW uint32 b[15:0] -
- - - - udp_checksum 0x0004a016 1 RW uint32 b[15:0] - - -
- - - - udp_length 0x0004a017 1 RW uint32 b[15:0] -
- - - - udp_length 0x0004a017 1 RW uint32 b[15:0] - - -
- - - - udp_destination_port 0x0004a018 1 RW uint32 b[15:0] -
- - - - udp_destination_port 0x0004a018 1 RW uint32 b[15:0] - - -
- - - - udp_source_port 0x0004a019 1 RW uint32 b[15:0] -
- - - - udp_source_port 0x0004a019 1 RW uint32 b[15:0] - - -
- - - - ip_destination_address 0x0004a01a 1 RW uint32 b[31:0] -
- - - - ip_destination_address 0x0004a01a 1 RW uint32 b[31:0] - - -
- - - - ip_source_address 0x0004a01b 1 RW uint32 b[31:0] -
- - - - ip_source_address 0x0004a01b 1 RW uint32 b[31:0] - - -
- - - - ip_header_checksum 0x0004a01c 1 RW uint32 b[15:0] -
- - - - ip_header_checksum 0x0004a01c 1 RW uint32 b[15:0] - - -
- - - - ip_protocol 0x0004a01d 1 RW uint32 b[7:0] -
- - - - ip_protocol 0x0004a01d 1 RW uint32 b[7:0] - - -
- - - - ip_time_to_live 0x0004a01e 1 RW uint32 b[7:0] -
- - - - ip_time_to_live 0x0004a01e 1 RW uint32 b[7:0] - - -
- - - - ip_fragment_offset 0x0004a01f 1 RW uint32 b[12:0] -
- - - - ip_fragment_offset 0x0004a01f 1 RW uint32 b[12:0] - - -
- - - - ip_flags 0x0004a020 1 RW uint32 b[2:0] -
- - - - ip_flags 0x0004a020 1 RW uint32 b[2:0] - - -
- - - - ip_identification 0x0004a021 1 RW uint32 b[15:0] -
- - - - ip_identification 0x0004a021 1 RW uint32 b[15:0] - - -
- - - - ip_total_length 0x0004a022 1 RW uint32 b[15:0] -
- - - - ip_total_length 0x0004a022 1 RW uint32 b[15:0] - - -
- - - - ip_services 0x0004a023 1 RW uint32 b[7:0] -
- - - - ip_services 0x0004a023 1 RW uint32 b[7:0] - - -
- - - - ip_header_length 0x0004a024 1 RW uint32 b[3:0] -
- - - - ip_header_length 0x0004a024 1 RW uint32 b[3:0] - - -
- - - - ip_version 0x0004a025 1 RW uint32 b[3:0] -
- - - - ip_version 0x0004a025 1 RW uint32 b[3:0] - - -
- - - - eth_type 0x0004a026 1 RO uint32 b[15:0] -
- - - - eth_type 0x0004a026 1 RO uint32 b[15:0] - - -
- - - - eth_source_mac 0x0004a027 1 RO uint64 b[31:0] b[31:0]
- - - - eth_source_mac 0x0004a027 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x0004a028 - - - b[15:0] b[47:32]
- - - - - 0x0004a028 - - - b[15:0] b[47:32] - -
- - - - eth_destination_mac 0x0004a029 1 RW uint64 b[31:0] b[31:0]
- - - - eth_destination_mac 0x0004a029 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x0004a02a - - - b[15:0] b[47:32]
- - - - - 0x0004a02a - - - b[15:0] b[47:32] - -
- - - - word_align 0x0004a02b 1 RW uint32 b[15:0] -
- - - - word_align 0x0004a02b 1 RW uint32 b[15:0] - - -
REG_SDP_INFO 1 1 REG station_id 0x0004c000 1 RW uint32 b[15:0] -
REG_SDP_INFO 1 1 REG beamlet_scale 0x0004c000 1 RW uint32 b[15:0] - - -
- - - - antenna_band_index 0x0004c001 1 RO uint32 b[0:0] -
- - - - block_period 0x0004c001 1 RO uint32 b[15:0] - - -
- - - - observation_id 0x0004c002 1 RW uint32 b[31:0] -
- - - - n_rn 0x0004c002 1 RW uint32 b[7:0] - - -
- - - - nyquist_zone_index 0x0004c003 1 RW uint32 b[1:0] -
- - - - o_rn 0x0004c003 1 RW uint32 b[7:0] - - -
- - - - f_adc 0x0004c004 1 RO uint32 b[0:0] -
- - - - n_si 0x0004c004 1 RW uint32 b[7:0] - - -
- - - - fsub_type 0x0004c005 1 RO uint32 b[0:0] -
- - - - o_si 0x0004c005 1 RW uint32 b[7:0] - - -
- - - - beam_repositioning_flag 0x0004c006 1 RW uint32 b[0:0] -
- - - - beam_repositioning_flag 0x0004c006 1 RW uint32 b[0:0] - - -
- - - - subband_calibrated_flag 0x0004c007 1 RW uint32 b[0:0] -
- - - - fsub_type 0x0004c007 1 RO uint32 b[0:0] - - -
- - - - o_si 0x0004c008 1 RW uint32 b[7:0] -
- - - - f_adc 0x0004c008 1 RO uint32 b[0:0] - - -
- - - - n_si 0x0004c009 1 RW uint32 b[7:0] -
- - - - nyquist_zone_index 0x0004c009 1 RW uint32 b[1:0] - - -
- - - - o_rn 0x0004c00a 1 RW uint32 b[7:0] -
- - - - observation_id 0x0004c00a 1 RW uint32 b[31:0] - - -
- - - - n_rn 0x0004c00b 1 RW uint32 b[7:0] -
- - - - antenna_band_index 0x0004c00b 1 RO uint32 b[0:0] - - -
- - - - block_period 0x0004c00c 1 RO uint32 b[15:0] -
- - - - station_id 0x0004c00c 1 RW uint32 b[15:0] - - -
- - - - beamlet_scale 0x0004c00d 1 RW uint32 b[15:0] -
RAM_SS_SS_WIDE 2 6 RAM data 0x0004e000 976 RW uint32 b[9:0] - 8192 1024
RAM_SS_SS_WIDE 2 6 RAM data 0x0004e000 976 RW uint32 b[9:0] -
RAM_BF_WEIGHTS 2 12 RAM data 0x00054000 976 RW cint16_ir b[31:0] - 16384 1024
RAM_BF_WEIGHTS 2 12 RAM data 0x00054000 976 RW cint16_ir b[31:0] -
REG_BF_SCALE 2 1 REG scale 0x0005c000 1 RW uint32 b[15:0] - 2 2
REG_BF_SCALE 2 1 REG scale 0x0005c000 1 RW uint32 b[15:0] -
- - - - unused 0x0005c001 1 RW uint32 b[31:0] - - -
- - - - unused 0x0005c001 1 RW uint32 b[31:0] -
REG_HDR_DAT 2 1 REG bsn 0x0005e000 1 RW uint64 b[31:0] b[31:0] 64 64
REG_HDR_DAT 2 1 REG bsn 0x0005e000 1 RW uint64 b[31:0] b[31:0]
- - - - - 0x0005e001 - - - b[31:0] b[63:32] - -
- - - - - 0x0005e001 - - - b[31:0] b[63:32]
- - - - sdp_block_period 0x0005e002 1 RW uint32 b[15:0] - - -
- - - - sdp_block_period 0x0005e002 1 RW uint32 b[15:0] -
- - - - sdp_nof_beamlets_per_block 0x0005e003 1 RW uint32 b[15:0] - - -
- - - - sdp_nof_beamlets_per_block 0x0005e003 1 RW uint32 b[15:0] -
- - - - sdp_nof_blocks_per_packet 0x0005e004 1 RW uint32 b[7:0] - - -
- - - - sdp_nof_blocks_per_packet 0x0005e004 1 RW uint32 b[7:0] -
- - - - sdp_beamlet_index 0x0005e005 1 RW uint32 b[15:0] - - -
- - - - sdp_beamlet_index 0x0005e005 1 RW uint32 b[15:0] -
- - - - sdp_beamlet_scale 0x0005e006 1 RW uint32 b[15:0] - - -
- - - - sdp_beamlet_scale 0x0005e006 1 RW uint32 b[15:0] -
- - - - sdp_reserved 0x0005e007 1 RW uint64 b[31:0] b[31:0] - -
- - - - sdp_reserved 0x0005e007 1 RW uint64 b[31:0] b[31:0]
- - - - - 0x0005e008 - - - b[7:0] b[39:32] - -
- - - - - 0x0005e008 - - - b[7:0] b[39:32]
- - - - sdp_source_info_gn_index 0x0005e009 1 RW uint32 b[4:0] - - -
- - - - sdp_source_info_gn_index 0x0005e009 1 RW uint32 b[4:0] -
- - - - sdp_source_info_beamlet_width 0x0005e00a 1 RW uint32 b[7:5] - - -
- - - - sdp_source_info_beamlet_width 0x0005e00a 1 RW uint32 b[7:5] -
- - - - sdp_source_info_repositioning_flag 0x0005e00b 1 RW uint32 b[9:9] - - -
- - - - sdp_source_info_repositioning_flag 0x0005e00b 1 RW uint32 b[9:9] -
- - - - sdp_source_info_payload_error 0x0005e00c 1 RW uint32 b[10:10] - - -
- - - - sdp_source_info_payload_error 0x0005e00c 1 RW uint32 b[10:10] -
- - - - sdp_source_info_fsub_type 0x0005e00d 1 RW uint32 b[11:11] - - -
- - - - sdp_source_info_fsub_type 0x0005e00d 1 RW uint32 b[11:11] -
- - - - sdp_source_info_f_adc 0x0005e00e 1 RW uint32 b[12:12] - - -
- - - - sdp_source_info_f_adc 0x0005e00e 1 RW uint32 b[12:12] -
- - - - sdp_source_info_nyquist_zone_index 0x0005e00f 1 RW uint32 b[14:13] - - -
- - - - sdp_source_info_nyquist_zone_index 0x0005e00f 1 RW uint32 b[14:13] -
- - - - sdp_source_info_antenna_band_index 0x0005e010 1 RW uint32 b[15:15] - - -
- - - - sdp_source_info_antenna_band_index 0x0005e010 1 RW uint32 b[15:15] -
- - - - sdp_station_id 0x0005e011 1 RW uint32 b[15:0] - - -
- - - - sdp_station_id 0x0005e011 1 RW uint32 b[15:0] -
- - - - sdp_observation_id 0x0005e012 1 RW uint32 b[31:0] - - -
- - - - sdp_observation_id 0x0005e012 1 RW uint32 b[31:0] -
- - - - sdp_version_id 0x0005e013 1 RO uint32 b[7:0] - - -
- - - - sdp_version_id 0x0005e013 1 RO uint32 b[7:0] -
- - - - sdp_marker 0x0005e014 1 RO uint32 b[7:0] - - -
- - - - sdp_marker 0x0005e014 1 RO uint32 b[7:0] -
- - - - udp_checksum 0x0005e015 1 RW uint32 b[15:0] - - -
- - - - udp_checksum 0x0005e015 1 RW uint32 b[15:0] -
- - - - udp_length 0x0005e016 1 RW uint32 b[15:0] - - -
- - - - udp_length 0x0005e016 1 RW uint32 b[15:0] -
- - - - udp_destination_port 0x0005e017 1 RW uint32 b[15:0] - - -
- - - - udp_destination_port 0x0005e017 1 RW uint32 b[15:0] -
- - - - udp_source_port 0x0005e018 1 RW uint32 b[15:0] - - -
- - - - udp_source_port 0x0005e018 1 RW uint32 b[15:0] -
- - - - ip_destination_address 0x0005e019 1 RW uint32 b[31:0] - - -
- - - - ip_destination_address 0x0005e019 1 RW uint32 b[31:0] -
- - - - ip_source_address 0x0005e01a 1 RW uint32 b[31:0] - - -
- - - - ip_source_address 0x0005e01a 1 RW uint32 b[31:0] -
- - - - ip_header_checksum 0x0005e01b 1 RW uint32 b[15:0] - - -
- - - - ip_header_checksum 0x0005e01b 1 RW uint32 b[15:0] -
- - - - ip_protocol 0x0005e01c 1 RW uint32 b[7:0] - - -
- - - - ip_protocol 0x0005e01c 1 RW uint32 b[7:0] -
- - - - ip_time_to_live 0x0005e01d 1 RW uint32 b[7:0] - - -
- - - - ip_time_to_live 0x0005e01d 1 RW uint32 b[7:0] -
- - - - ip_fragment_offset 0x0005e01e 1 RW uint32 b[12:0] - - -
- - - - ip_fragment_offset 0x0005e01e 1 RW uint32 b[12:0] -
- - - - ip_flags 0x0005e01f 1 RW uint32 b[2:0] - - -
- - - - ip_flags 0x0005e01f 1 RW uint32 b[2:0] -
- - - - ip_identification 0x0005e020 1 RW uint32 b[15:0] - - -
- - - - ip_identification 0x0005e020 1 RW uint32 b[15:0] -
- - - - ip_total_length 0x0005e021 1 RW uint32 b[15:0] - - -
- - - - ip_total_length 0x0005e021 1 RW uint32 b[15:0] -
- - - - ip_services 0x0005e022 1 RW uint32 b[7:0] - - -
- - - - ip_services 0x0005e022 1 RW uint32 b[7:0] -
- - - - ip_header_length 0x0005e023 1 RW uint32 b[3:0] - - -
- - - - ip_header_length 0x0005e023 1 RW uint32 b[3:0] -
- - - - ip_version 0x0005e024 1 RW uint32 b[3:0] - - -
- - - - ip_version 0x0005e024 1 RW uint32 b[3:0] -
- - - - eth_type 0x0005e025 1 RO uint32 b[15:0] - - -
- - - - eth_type 0x0005e025 1 RO uint32 b[15:0] -
- - - - eth_source_mac 0x0005e026 1 RO uint64 b[31:0] b[31:0] - -
- - - - eth_source_mac 0x0005e026 1 RO uint64 b[31:0] b[31:0]
- - - - - 0x0005e027 - - - b[15:0] b[47:32] - -
- - - - - 0x0005e027 - - - b[15:0] b[47:32]
- - - - eth_destination_mac 0x0005e028 1 RW uint64 b[31:0] b[31:0] - -
- - - - eth_destination_mac 0x0005e028 1 RW uint64 b[31:0] b[31:0]
- - - - - 0x0005e029 - - - b[15:0] b[47:32] - -
- - - - - 0x0005e029 - - - b[15:0] b[47:32]
REG_DP_XONOFF 2 1 REG enable_stream 0x00060000 1 RW uint32 b[0:0] - 1 1
REG_DP_XONOFF 2 1 REG enable_stream 0x00060000 1 RW uint32 b[0:0] -
RAM_ST_BST 1 1 RAM data 0x00062000 1952 RW uint64 b[31:0] b[31:0] - -
RAM_ST_BST 2 1 RAM data 0x00062000 1952 RW uint64 b[31:0] b[31:0]
- - - - - 0x00060001 - - - b[21:0] b[53:32] - -
- - - - - 0x00060001 - - - b[21:0] b[53:32]
REG_STAT_ENABLE_BST 1 1 REG enable 0x00064000 1 RW uint32 b[0:0] - - -
REG_STAT_ENABLE_BST 1 1 REG enable 0x00064000 1 RW uint32 b[0:0] -
REG_STAT_HDR_INFO_BST 1 1 REG bsn 0x00066000 1 RW uint64 b[31:0] b[31:0] - -
REG_STAT_HDR_INFO_BST 1 1 REG bsn 0x00066000 1 RW uint64 b[31:0] b[31:0]
- - - - - 0x00066001 - - - b[31:0] b[63:32] - -
- - - - - 0x00066001 - - - b[31:0] b[63:32]
- - - - block_period 0x00066002 1 RW uint32 b[15:0] - - -
- - - - block_period 0x00066002 1 RW uint32 b[15:0] -
- - - - nof_statistics_per_packet 0x00066003 1 RW uint32 b[15:0] - - -
- - - - nof_statistics_per_packet 0x00066003 1 RW uint32 b[15:0] -
- - - - nof_bytes_per_statistic 0x00066004 1 RW uint32 b[7:0] - - -
- - - - nof_bytes_per_statistic 0x00066004 1 RW uint32 b[7:0] -
- - - - nof_signal_inputs 0x00066005 1 RW uint32 b[7:0] - - -
- - - - nof_signal_inputs 0x00066005 1 RW uint32 b[7:0] -
- - - - sdp_data_id 0x00066006 1 RW uint32 b[31:0] - - -
- - - - sdp_data_id 0x00066006 1 RW uint32 b[31:0] -
- - - - sdp_data_id_bst_beamlet_index 0x00066006 1 RW uint32 b[15:0] - - -
- - - - sdp_data_id_bst_beamlet_index 0x00066006 1 RW uint32 b[15:0] -
- - - - sdp_data_id_bst_reserved 0x00066006 1 RW uint32 b[31:16] - - -
- - - - sdp_data_id_bst_reserved 0x00066006 1 RW uint32 b[31:16] -
- - - - sdp_integration_interval 0x00066007 1 RW uint32 b[23:0] - - -
- - - - sdp_integration_interval 0x00066007 1 RW uint32 b[23:0] -
- - - - sdp_reserved 0x00066008 1 RW uint32 b[7:0] - - -
- - - - sdp_reserved 0x00066008 1 RW uint32 b[7:0] -
- - - - sdp_source_info_gn_index 0x00066009 1 RW uint32 b[4:0] - - -
- - - - sdp_source_info_gn_index 0x00066009 1 RW uint32 b[4:0] -
- - - - sdp_source_info_reserved 0x0006600a 1 RW uint32 b[7:5] - - -
- - - - sdp_source_info_reserved 0x0006600a 1 RW uint32 b[7:5] -
- - - - sdp_source_info_subband_calibrated_flag 0x0006600b 1 RW uint32 b[8:8] - - -
- - - - sdp_source_info_subband_calibrated_flag 0x0006600b 1 RW uint32 b[8:8] -
- - - - sdp_source_info_beam_repositioning_flag 0x0006600c 1 RW uint32 b[9:9] - - -
- - - - sdp_source_info_beam_repositioning_flag 0x0006600c 1 RW uint32 b[9:9] -
- - - - sdp_source_info_payload_error 0x0006600d 1 RW uint32 b[10:10] - - -
- - - - sdp_source_info_payload_error 0x0006600d 1 RW uint32 b[10:10] -
- - - - sdp_source_info_fsub_type 0x0006600e 1 RW uint32 b[11:11] - - -
- - - - sdp_source_info_fsub_type 0x0006600e 1 RW uint32 b[11:11] -
- - - - sdp_source_info_f_adc 0x0006600f 1 RW uint32 b[12:12] - - -
- - - - sdp_source_info_f_adc 0x0006600f 1 RW uint32 b[12:12] -
- - - - sdp_source_info_nyquist_zone_index 0x00066010 1 RW uint32 b[14:13] - - -
- - - - sdp_source_info_nyquist_zone_index 0x00066010 1 RW uint32 b[14:13] -
- - - - sdp_source_info_antenna_band_index 0x00066011 1 RW uint32 b[15:15] - - -
- - - - sdp_source_info_antenna_band_index 0x00066011 1 RW uint32 b[15:15] -
- - - - sdp_station_id 0x00066012 1 RW uint32 b[15:0] - - -
- - - - sdp_station_id 0x00066012 1 RW uint32 b[15:0] -
- - - - sdp_observation_id 0x00066013 1 RW uint32 b[31:0] - - -
- - - - sdp_observation_id 0x00066013 1 RW uint32 b[31:0] -
- - - - sdp_version_id 0x00066014 1 RO uint32 b[7:0] - - -
- - - - sdp_version_id 0x00066014 1 RO uint32 b[7:0] -
- - - - sdp_marker 0x00066015 1 RO uint32 b[7:0] - - -
- - - - sdp_marker 0x00066015 1 RO uint32 b[7:0] -
- - - - udp_checksum 0x00066016 1 RW uint32 b[15:0] - - -
- - - - udp_checksum 0x00066016 1 RW uint32 b[15:0] -
- - - - udp_length 0x00066017 1 RW uint32 b[15:0] - - -
- - - - udp_length 0x00066017 1 RW uint32 b[15:0] -
- - - - udp_destination_port 0x00066018 1 RW uint32 b[15:0] - - -
- - - - udp_destination_port 0x00066018 1 RW uint32 b[15:0] -
- - - - udp_source_port 0x00066019 1 RW uint32 b[15:0] - - -
- - - - udp_source_port 0x00066019 1 RW uint32 b[15:0] -
- - - - ip_destination_address 0x0006601a 1 RW uint32 b[31:0] - - -
- - - - ip_destination_address 0x0006601a 1 RW uint32 b[31:0] -
- - - - ip_source_address 0x0006601b 1 RW uint32 b[31:0] - - -
- - - - ip_source_address 0x0006601b 1 RW uint32 b[31:0] -
- - - - ip_header_checksum 0x0006601c 1 RW uint32 b[15:0] - - -
- - - - ip_header_checksum 0x0006601c 1 RW uint32 b[15:0] -
- - - - ip_protocol 0x0006601d 1 RW uint32 b[7:0] - - -
- - - - ip_protocol 0x0006601d 1 RW uint32 b[7:0] -
- - - - ip_time_to_live 0x0006601e 1 RW uint32 b[7:0] - - -
- - - - ip_time_to_live 0x0006601e 1 RW uint32 b[7:0] -
- - - - ip_fragment_offset 0x0006601f 1 RW uint32 b[12:0] - - -
- - - - ip_fragment_offset 0x0006601f 1 RW uint32 b[12:0] -
- - - - ip_flags 0x00066020 1 RW uint32 b[2:0] - - -
- - - - ip_flags 0x00066020 1 RW uint32 b[2:0] -
- - - - ip_identification 0x00066021 1 RW uint32 b[15:0] - - -
- - - - ip_identification 0x00066021 1 RW uint32 b[15:0] -
- - - - ip_total_length 0x00066022 1 RW uint32 b[15:0] - - -
- - - - ip_total_length 0x00066022 1 RW uint32 b[15:0] -
- - - - ip_services 0x00066023 1 RW uint32 b[7:0] - - -
- - - - ip_services 0x00066023 1 RW uint32 b[7:0] -
- - - - ip_header_length 0x00066024 1 RW uint32 b[3:0] - - -
- - - - ip_header_length 0x00066024 1 RW uint32 b[3:0] -
- - - - ip_version 0x00066025 1 RW uint32 b[3:0] - - -
- - - - ip_version 0x00066025 1 RW uint32 b[3:0] -
- - - - eth_type 0x00066026 1 RO uint32 b[15:0] - - -
- - - - eth_type 0x00066026 1 RO uint32 b[15:0] -
- - - - eth_source_mac 0x00066027 1 RO uint64 b[31:0] b[31:0] - -
- - - - eth_source_mac 0x00066027 1 RO uint64 b[31:0] b[31:0]
- - - - - 0x00066028 - - - b[15:0] b[47:32] - -
- - - - - 0x00066028 - - - b[15:0] b[47:32]
- - - - eth_destination_mac 0x00066029 1 RW uint64 b[31:0] b[31:0] - -
- - - - eth_destination_mac 0x00066029 1 RW uint64 b[31:0] b[31:0]
- - - - - 0x0006602a - - - b[15:0] b[47:32] - -
- - - - - 0x0006602a - - - b[15:0] b[47:32]
- - - - word_align 0x0006602b 1 RW uint32 b[15:0] - - -
- - - - word_align 0x0006602b 1 RW uint32 b[15:0] -
REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00068000 1 RW uint32 b[0:0] - - -
REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00068000 1 RW uint32 b[0:0] -
- - - - rx_transfer_status 0x00068001 1 RO uint32 b[0:0] - - -
- - - - rx_transfer_status 0x00068001 1 RO uint32 b[0:0] -
- - - - tx_transfer_control 0x00068002 1 RW uint32 b[0:0] - - -
- - - - tx_transfer_control 0x00068002 1 RW uint32 b[0:0] -
- - - - rx_padcrc_control 0x00068040 1 RW uint32 b[1:0] - - -
- - - - rx_padcrc_control 0x00068040 1 RW uint32 b[1:0] -
- - - - rx_crccheck_control 0x00068080 1 RW uint32 b[1:0] - - -
- - - - rx_crccheck_control 0x00068080 1 RW uint32 b[1:0] -
- - - - rx_pktovrflow_error 0x000680c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_pktovrflow_error 0x000680c0 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x000680c1 - - - b[31:0] b[31:0] - -
- - - - - 0x000680c1 - - - b[31:0] b[31:0]
- - - - rx_pktovrflow_etherstatsdropevents 0x000680c2 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_pktovrflow_etherstatsdropevents 0x000680c2 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x000680c3 - - - b[31:0] b[31:0] - -
- - - - - 0x000680c3 - - - b[31:0] b[31:0]
- - - - rx_lane_decoder_preamble_control 0x00068100 1 RW uint32 b[0:0] - - -
- - - - rx_lane_decoder_preamble_control 0x00068100 1 RW uint32 b[0:0] -
- - - - rx_preamble_inserter_control 0x00068140 1 RW uint32 b[0:0] - - -
- - - - rx_preamble_inserter_control 0x00068140 1 RW uint32 b[0:0] -
- - - - rx_frame_control 0x00068800 1 RW uint32 b[19:0] - - -
- - - - rx_frame_control 0x00068800 1 RW uint32 b[19:0] -
- - - - rx_frame_maxlength 0x00068801 1 RW uint32 b[15:0] - - -
- - - - rx_frame_maxlength 0x00068801 1 RW uint32 b[15:0] -
- - - - rx_frame_addr0 0x00068802 1 RW uint32 b[15:0] - - -
- - - - rx_frame_addr0 0x00068802 1 RW uint32 b[15:0] -
- - - - rx_frame_addr1 0x00068803 1 RW uint32 b[15:0] - - -
- - - - rx_frame_addr1 0x00068803 1 RW uint32 b[15:0] -
- - - - rx_frame_spaddr0_0 0x00068804 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr0_0 0x00068804 1 RW uint32 b[15:0] -
- - - - rx_frame_spaddr0_1 0x00068805 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr0_1 0x00068805 1 RW uint32 b[15:0] -
- - - - rx_frame_spaddr1_0 0x00068806 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr1_0 0x00068806 1 RW uint32 b[15:0] -
- - - - rx_frame_spaddr1_1 0x00068807 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr1_1 0x00068807 1 RW uint32 b[15:0] -
- - - - rx_frame_spaddr2_0 0x00068808 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr2_0 0x00068808 1 RW uint32 b[15:0] -
- - - - rx_frame_spaddr2_1 0x00068809 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr2_1 0x00068809 1 RW uint32 b[15:0] -
- - - - rx_frame_spaddr3_0 0x0006880a 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr3_0 0x0006880a 1 RW uint32 b[15:0] -
- - - - rx_frame_spaddr3_1 0x0006880b 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr3_1 0x0006880b 1 RW uint32 b[15:0] -
- - - - rx_pfc_control 0x00068818 1 RW uint32 b[16:0] - - -
- - - - rx_pfc_control 0x00068818 1 RW uint32 b[16:0] -
- - - - rx_stats_clr 0x00068c00 1 RW uint32 b[0:0] - - -
- - - - rx_stats_clr 0x00068c00 1 RW uint32 b[0:0] -
- - - - rx_stats_framesok 0x00068c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_framesok 0x00068c02 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c03 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c03 - - - b[31:0] b[31:0]
- - - - rx_stats_frameserr 0x00068c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_frameserr 0x00068c04 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c05 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c05 - - - b[31:0] b[31:0]
- - - - rx_stats_framescrcerr 0x00068c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_framescrcerr 0x00068c06 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c07 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c07 - - - b[31:0] b[31:0]
- - - - rx_stats_octetsok 0x00068c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_octetsok 0x00068c08 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c09 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c09 - - - b[31:0] b[31:0]
- - - - rx_stats_pausemacctrl_frames 0x00068c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_pausemacctrl_frames 0x00068c0a 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c0b - - - b[31:0] b[31:0] - -
- - - - - 0x00068c0b - - - b[31:0] b[31:0]
- - - - rx_stats_iferrors 0x00068c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_iferrors 0x00068c0c 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c0d - - - b[31:0] b[31:0] - -
- - - - - 0x00068c0d - - - b[31:0] b[31:0]
- - - - rx_stats_unicast_framesok 0x00068c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_unicast_framesok 0x00068c0e 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c0f - - - b[31:0] b[31:0] - -
- - - - - 0x00068c0f - - - b[31:0] b[31:0]
- - - - rx_stats_unicast_frameserr 0x00068c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_unicast_frameserr 0x00068c10 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c11 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c11 - - - b[31:0] b[31:0]
- - - - rx_stats_multicastframesok 0x00068c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_multicastframesok 0x00068c12 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c13 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c13 - - - b[31:0] b[31:0]
- - - - rx_stats_multicast_frameserr 0x00068c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_multicast_frameserr 0x00068c14 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c15 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c15 - - - b[31:0] b[31:0]
- - - - rx_stats_broadcastframesok 0x00068c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_broadcastframesok 0x00068c16 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c17 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c17 - - - b[31:0] b[31:0]
- - - - rx_stats_broadcast_frameserr 0x00068c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_broadcast_frameserr 0x00068c18 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c19 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c19 - - - b[31:0] b[31:0]
- - - - rx_stats_etherstatsoctets 0x00068c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstatsoctets 0x00068c1a 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c1b - - - b[31:0] b[31:0] - -
- - - - - 0x00068c1b - - - b[31:0] b[31:0]
- - - - rx_stats_etherstatspkts 0x00068c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstatspkts 0x00068c1c 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c1d - - - b[31:0] b[31:0] - -
- - - - - 0x00068c1d - - - b[31:0] b[31:0]
- - - - rx_stats_etherstats_undersizepkts 0x00068c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstats_undersizepkts 0x00068c1e 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c1f - - - b[31:0] b[31:0] - -
- - - - - 0x00068c1f - - - b[31:0] b[31:0]
- - - - rx_stats_etherstats_oversizepkts 0x00068c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstats_oversizepkts 0x00068c20 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c21 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c21 - - - b[31:0] b[31:0]
- - - - rx_stats_etherstats_pkts64octets 0x00068c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstats_pkts64octets 0x00068c22 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c23 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c23 - - - b[31:0] b[31:0]
- - - - rx_stats_etherstats_pkts65to127octets 0x00068c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstats_pkts65to127octets 0x00068c24 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c25 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c25 - - - b[31:0] b[31:0]
- - - - rx_stats_etherstats_pkts128to255octets 0x00068c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstats_pkts128to255octets 0x00068c26 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c27 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c27 - - - b[31:0] b[31:0]
- - - - rx_stats_etherstats_pkts256to511octets 0x00068c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstats_pkts256to511octets 0x00068c28 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c29 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c29 - - - b[31:0] b[31:0]
- - - - rx_stats_etherstats_pkts512to1023octets 0x00068c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstats_pkts512to1023octets 0x00068c2a 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c2b - - - b[31:0] b[31:0] - -
- - - - - 0x00068c2b - - - b[31:0] b[31:0]
- - - - rx_stats_etherstat_pkts1024to1518octets 0x00068c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstat_pkts1024to1518octets 0x00068c2c 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c2d - - - b[31:0] b[31:0] - -
- - - - - 0x00068c2d - - - b[31:0] b[31:0]
- - - - rx_stats_etherstats_pkts1519toxoctets 0x00068c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstats_pkts1519toxoctets 0x00068c2e 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c2f - - - b[31:0] b[31:0] - -
- - - - - 0x00068c2f - - - b[31:0] b[31:0]
- - - - rx_stats_etherstats_fragments 0x00068c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstats_fragments 0x00068c30 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c31 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c31 - - - b[31:0] b[31:0]
- - - - rx_stats_etherstats_jabbers 0x00068c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstats_jabbers 0x00068c32 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c33 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c33 - - - b[31:0] b[31:0]
- - - - rx_stats_etherstatscrcerr 0x00068c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_etherstatscrcerr 0x00068c34 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c35 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c35 - - - b[31:0] b[31:0]
- - - - rx_stats_unicastmacctrlframes 0x00068c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_unicastmacctrlframes 0x00068c36 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c37 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c37 - - - b[31:0] b[31:0]
- - - - rx_stats_multicastmac_ctrlframes 0x00068c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_multicastmac_ctrlframes 0x00068c38 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c39 - - - b[31:0] b[31:0] - -
- - - - - 0x00068c39 - - - b[31:0] b[31:0]
- - - - rx_stats_broadcastmac_ctrlframes 0x00068c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_broadcastmac_ctrlframes 0x00068c3a 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c3b - - - b[31:0] b[31:0] - -
- - - - - 0x00068c3b - - - b[31:0] b[31:0]
- - - - rx_stats_pfcmacctrlframes 0x00068c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_pfcmacctrlframes 0x00068c3c 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00068c3d - - - b[31:0] b[31:0] - -
- - - - - 0x00068c3d - - - b[31:0] b[31:0]
- - - - tx_transfer_status 0x00069001 1 RO uint32 b[0:0] - - -
- - - - tx_transfer_status 0x00069001 1 RO uint32 b[0:0] -
- - - - tx_padins_control 0x00069040 1 RW uint32 b[0:0] - - -
- - - - tx_padins_control 0x00069040 1 RW uint32 b[0:0] -
- - - - tx_crcins_control 0x00069080 1 RW uint32 b[1:0] - - -
- - - - tx_crcins_control 0x00069080 1 RW uint32 b[1:0] -
- - - - tx_pktunderflow_error 0x000690c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_pktunderflow_error 0x000690c0 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x000690c1 - - - b[31:0] b[31:0] - -
- - - - - 0x000690c1 - - - b[31:0] b[31:0]
- - - - tx_preamble_control 0x00069100 1 RW uint32 b[0:0] - - -
- - - - tx_preamble_control 0x00069100 1 RW uint32 b[0:0] -
- - - - tx_pauseframe_control 0x00069140 1 RW uint32 b[1:0] - - -
- - - - tx_pauseframe_control 0x00069140 1 RW uint32 b[1:0] -
- - - - tx_pauseframe_quanta 0x00069141 1 RW uint32 b[15:0] - - -
- - - - tx_pauseframe_quanta 0x00069141 1 RW uint32 b[15:0] -
- - - - tx_pauseframe_enable 0x00069142 1 RW uint32 b[0:0] - - -
- - - - tx_pauseframe_enable 0x00069142 1 RW uint32 b[0:0] -
- - - - pfc_pause_quanta_0 0x00069180 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_0 0x00069180 1 RW uint32 b[31:0] -
- - - - pfc_pause_quanta_1 0x00069181 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_1 0x00069181 1 RW uint32 b[31:0] -
- - - - pfc_pause_quanta_2 0x00069182 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_2 0x00069182 1 RW uint32 b[31:0] -
- - - - pfc_pause_quanta_3 0x00069183 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_3 0x00069183 1 RW uint32 b[31:0] -
- - - - pfc_pause_quanta_4 0x00069184 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_4 0x00069184 1 RW uint32 b[31:0] -
- - - - pfc_pause_quanta_5 0x00069185 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_5 0x00069185 1 RW uint32 b[31:0] -
- - - - pfc_pause_quanta_6 0x00069186 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_6 0x00069186 1 RW uint32 b[31:0] -
- - - - pfc_pause_quanta_7 0x00069187 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_7 0x00069187 1 RW uint32 b[31:0] -
- - - - pfc_holdoff_quanta_0 0x00069190 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_0 0x00069190 1 RW uint32 b[31:0] -
- - - - pfc_holdoff_quanta_1 0x00069191 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_1 0x00069191 1 RW uint32 b[31:0] -
- - - - pfc_holdoff_quanta_2 0x00069192 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_2 0x00069192 1 RW uint32 b[31:0] -
- - - - pfc_holdoff_quanta_3 0x00069193 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_3 0x00069193 1 RW uint32 b[31:0] -
- - - - pfc_holdoff_quanta_4 0x00069194 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_4 0x00069194 1 RW uint32 b[31:0] -
- - - - pfc_holdoff_quanta_5 0x00069195 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_5 0x00069195 1 RW uint32 b[31:0] -
- - - - pfc_holdoff_quanta_6 0x00069196 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_6 0x00069196 1 RW uint32 b[31:0] -
- - - - pfc_holdoff_quanta_7 0x00069197 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_7 0x00069197 1 RW uint32 b[31:0] -
- - - - tx_pfc_priority_enable 0x000691a0 1 RW uint32 b[7:0] - - -
- - - - tx_pfc_priority_enable 0x000691a0 1 RW uint32 b[7:0] -
- - - - tx_addrins_control 0x00069200 1 RW uint32 b[0:0] - - -
- - - - tx_addrins_control 0x00069200 1 RW uint32 b[0:0] -
- - - - tx_addrins_macaddr0 0x00069201 1 RW uint32 b[31:0] - - -
- - - - tx_addrins_macaddr0 0x00069201 1 RW uint32 b[31:0] -
- - - - tx_addrins_macaddr1 0x00069202 1 RW uint32 b[15:0] - - -
- - - - tx_addrins_macaddr1 0x00069202 1 RW uint32 b[15:0] -
- - - - tx_frame_maxlength 0x00069801 1 RW uint32 b[15:0] - - -
- - - - tx_frame_maxlength 0x00069801 1 RW uint32 b[15:0] -
- - - - tx_stats_clr 0x00069c00 1 RW uint32 b[0:0] - - -
- - - - tx_stats_clr 0x00069c00 1 RW uint32 b[0:0] -
- - - - tx_stats_framesok 0x00069c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_framesok 0x00069c02 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c03 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c03 - - - b[31:0] b[31:0]
- - - - tx_stats_frameserr 0x00069c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_frameserr 0x00069c04 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c05 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c05 - - - b[31:0] b[31:0]
- - - - tx_stats_framescrcerr 0x00069c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_framescrcerr 0x00069c06 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c07 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c07 - - - b[31:0] b[31:0]
- - - - tx_stats_octetsok 0x00069c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_octetsok 0x00069c08 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c09 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c09 - - - b[31:0] b[31:0]
- - - - tx_stats_pausemacctrl_frames 0x00069c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_pausemacctrl_frames 0x00069c0a 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c0b - - - b[31:0] b[31:0] - -
- - - - - 0x00069c0b - - - b[31:0] b[31:0]
- - - - tx_stats_iferrors 0x00069c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_iferrors 0x00069c0c 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c0d - - - b[31:0] b[31:0] - -
- - - - - 0x00069c0d - - - b[31:0] b[31:0]
- - - - tx_stats_unicast_framesok 0x00069c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_unicast_framesok 0x00069c0e 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c0f - - - b[31:0] b[31:0] - -
- - - - - 0x00069c0f - - - b[31:0] b[31:0]
- - - - tx_stats_unicast_frameserr 0x00069c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_unicast_frameserr 0x00069c10 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c11 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c11 - - - b[31:0] b[31:0]
- - - - tx_stats_multicastframesok 0x00069c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_multicastframesok 0x00069c12 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c13 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c13 - - - b[31:0] b[31:0]
- - - - tx_stats_multicast_frameserr 0x00069c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_multicast_frameserr 0x00069c14 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c15 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c15 - - - b[31:0] b[31:0]
- - - - tx_stats_broadcastframesok 0x00069c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_broadcastframesok 0x00069c16 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c17 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c17 - - - b[31:0] b[31:0]
- - - - tx_stats_broadcast_frameserr 0x00069c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_broadcast_frameserr 0x00069c18 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c19 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c19 - - - b[31:0] b[31:0]
- - - - tx_stats_etherstatsoctets 0x00069c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstatsoctets 0x00069c1a 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c1b - - - b[31:0] b[31:0] - -
- - - - - 0x00069c1b - - - b[31:0] b[31:0]
- - - - tx_stats_etherstatspkts 0x00069c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstatspkts 0x00069c1c 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c1d - - - b[31:0] b[31:0] - -
- - - - - 0x00069c1d - - - b[31:0] b[31:0]
- - - - tx_stats_etherstats_undersizepkts 0x00069c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstats_undersizepkts 0x00069c1e 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c1f - - - b[31:0] b[31:0] - -
- - - - - 0x00069c1f - - - b[31:0] b[31:0]
- - - - tx_stats_etherstats_oversizepkts 0x00069c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstats_oversizepkts 0x00069c20 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c21 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c21 - - - b[31:0] b[31:0]
- - - - tx_stats_etherstats_pkts64octets 0x00069c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstats_pkts64octets 0x00069c22 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c23 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c23 - - - b[31:0] b[31:0]
- - - - tx_stats_etherstats_pkts65to127octets 0x00069c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstats_pkts65to127octets 0x00069c24 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c25 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c25 - - - b[31:0] b[31:0]
- - - - tx_stats_etherstats_pkts128to255octets 0x00069c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstats_pkts128to255octets 0x00069c26 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c27 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c27 - - - b[31:0] b[31:0]
- - - - tx_stats_etherstats_pkts256to511octets 0x00069c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstats_pkts256to511octets 0x00069c28 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c29 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c29 - - - b[31:0] b[31:0]
- - - - tx_stats_etherstats_pkts512to1023octets 0x00069c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstats_pkts512to1023octets 0x00069c2a 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c2b - - - b[31:0] b[31:0] - -
- - - - - 0x00069c2b - - - b[31:0] b[31:0]
- - - - tx_stats_etherstat_pkts1024to1518octets 0x00069c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstat_pkts1024to1518octets 0x00069c2c 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c2d - - - b[31:0] b[31:0] - -
- - - - - 0x00069c2d - - - b[31:0] b[31:0]
- - - - tx_stats_etherstats_pkts1519toxoctets 0x00069c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstats_pkts1519toxoctets 0x00069c2e 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c2f - - - b[31:0] b[31:0] - -
- - - - - 0x00069c2f - - - b[31:0] b[31:0]
- - - - tx_stats_etherstats_fragments 0x00069c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstats_fragments 0x00069c30 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c31 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c31 - - - b[31:0] b[31:0]
- - - - tx_stats_etherstats_jabbers 0x00069c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstats_jabbers 0x00069c32 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c33 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c33 - - - b[31:0] b[31:0]
- - - - tx_stats_etherstatscrcerr 0x00069c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_etherstatscrcerr 0x00069c34 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c35 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c35 - - - b[31:0] b[31:0]
- - - - tx_stats_unicastmacctrlframes 0x00069c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_unicastmacctrlframes 0x00069c36 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c37 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c37 - - - b[31:0] b[31:0]
- - - - tx_stats_multicastmac_ctrlframes 0x00069c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_multicastmac_ctrlframes 0x00069c38 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c39 - - - b[31:0] b[31:0] - -
- - - - - 0x00069c39 - - - b[31:0] b[31:0]
- - - - tx_stats_broadcastmac_ctrlframes 0x00069c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_broadcastmac_ctrlframes 0x00069c3a 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c3b - - - b[31:0] b[31:0] - -
- - - - - 0x00069c3b - - - b[31:0] b[31:0]
- - - - tx_stats_pfcmacctrlframes 0x00069c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_stats_pfcmacctrlframes 0x00069c3c 1 RO uint64 b[3:0] b[35:32]
- - - - - 0x00069c3d - - - b[31:0] b[31:0] - -
- - - - - 0x00069c3d - - - b[31:0] b[31:0]
REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x0006a000 1 RO uint32 b[0:0] - - -
REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x0006a000 1 RO uint32 b[0:0] -
- - - - xgmii_tx_ready 0x0006a000 1 RO uint32 b[1:1] - - -
- - - - xgmii_tx_ready 0x0006a000 1 RO uint32 b[1:1] -
- - - - xgmii_link_status 0x0006a000 1 RO uint32 b[3:2] - - -
- - - - xgmii_link_status 0x0006a000 1 RO uint32 b[3:2] -
\ No newline at end of file
\ No newline at end of file
This diff is collapsed.
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libraries/base/diag/diag.peripheral.yaml
+
2
−
0
View file @
3e44ef8e
...
@@ -15,6 +15,7 @@ peripherals:
...
@@ -15,6 +15,7 @@ peripherals:
# MM port for diag_wg_wideband_reg.vhd
# MM port for diag_wg_wideband_reg.vhd
-
mm_port_name
:
REG_DIAG_WG
-
mm_port_name
:
REG_DIAG_WG
mm_port_type
:
REG
mm_port_type
:
REG
mm_port_span
:
16
mm_port_description
:
"
Waveform
control."
mm_port_description
:
"
Waveform
control."
number_of_mm_ports
:
g_nof_streams
number_of_mm_ports
:
g_nof_streams
fields
:
fields
:
...
@@ -51,6 +52,7 @@ peripherals:
...
@@ -51,6 +52,7 @@ peripherals:
# MM port for mms_diag_wg_wideband.vhd
# MM port for mms_diag_wg_wideband.vhd
-
mm_port_name
:
RAM_DIAG_WG
-
mm_port_name
:
RAM_DIAG_WG
mm_port_type
:
RAM
mm_port_type
:
RAM
mm_port_span
:
4096
mm_port_description
:
"
Waveform
buffer."
mm_port_description
:
"
Waveform
buffer."
number_of_mm_ports
:
g_nof_streams
number_of_mm_ports
:
g_nof_streams
fields
:
fields
:
...
...
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