Updated comment

libraries/dsp/st/src/vhdl/st_xsq.vhd

@@ -19,11 +19,11 @@
 -------------------------------------------------------------------------------
 -- Author : R. vd Walle
 -- Purpose:
---   Store the (auto)power statistics of a complex input stream with
+--   Store the statistics of the complex input streams in_a and in_b with
 --   blocks of g_nof_crosslets * g_nof_signal_inputs**2 multiplexed subbands into a MM register.
 -- Description:                                                          
 --
---   After each sync the MM register gets updated with the (auto) power statistics
+--   After each sync the MM register gets updated with the statistics
 --   of the previous sync interval. The length of the sync interval determines
 --   the nof accumlations per statistic, hence the integration time. See st_calc
 --   for more details.
@@ -35,7 +35,9 @@
 --   Therefore it is not necessary to use a dual page register that swaps at
 --   the sync. 
 -- . The minimum c_nof_statistics = 8. Lower values lead to simulation errors. This is
---   due to the read latency of 2 of the accumulation memory in the st_calc entity. 
+--   due to the read latency of 2 of the accumulation memory in the st_calc entity.
+-- . More detail can be found in:
+--   https://support.astron.nl/confluence/display/L2M/L5+SDPFW+Design+Document%3A+Subband+Correlator
 -------------------------------------------------------------------------------
 
 LIBRARY IEEE, common_lib, mm_lib, technology_lib, dp_lib;
@@ -55,14 +57,14 @@ ENTITY st_xsq IS
     g_stat_data_sz      : NATURAL := 2      -- statistics word width >= statistics accumulator width and fit in a power of 2 multiple 32b MM words
   );                
   PORT (            
-    mm_rst          : IN  STD_LOGIC;
-    mm_clk          : IN  STD_LOGIC;
-    dp_rst          : IN  STD_LOGIC;
-    dp_clk          : IN  STD_LOGIC;
+    mm_rst : IN  STD_LOGIC;
+    mm_clk : IN  STD_LOGIC;
+    dp_rst : IN  STD_LOGIC;
+    dp_clk : IN  STD_LOGIC;
                     
     -- Streaming    
-    in_a      : IN  t_dp_sosi;   -- Complex input data
-    in_b      : IN  t_dp_sosi;   -- Complex input data
+    in_a   : IN  t_dp_sosi;   -- Complex input data
+    in_b   : IN  t_dp_sosi;   -- Complex input data
     
     -- Memory Mapped
     ram_st_xsq_mosi : IN  t_mem_mosi := c_mem_mosi_rst;  
@@ -136,7 +138,9 @@ BEGIN
     src_out      => pipe_in_b
   );
 
-  -- accumulators
+  ---------------------------------------------------------------
+  -- st_calc 
+  ---------------------------------------------------------------
   st_calc : ENTITY work.st_calc 
   GENERIC MAP (
     g_technology   => g_technology,
@@ -169,12 +173,11 @@ BEGIN
   ---------------------------------------------------------------
   -- COMBINE MEMORY MAPPED INTERFACES
   ---------------------------------------------------------------
-  -- Translate incoming MM interface [N_crosslets][S_pn A][S_pn B][N_complex][word] to
-  -- [N_complex][N_crosslets][S_pn A][S_pn B][word]
+  -- Translate incoming MM interface [crosslets][in A][in B][complex][word] to
+  -- [complex][crosslets][in A][in B][word]
   p_remap : PROCESS(ram_st_xsq_mosi)
   BEGIN
     remapped_ram_st_xsq_mosi <= ram_st_xsq_mosi;
-    -- 
     remapped_ram_st_xsq_mosi.address(c_total_ram_addr_w -1 DOWNTO c_nof_word_w) <= ram_st_xsq_mosi.address(ceil_log2(c_nof_complex)+ceil_log2(g_stat_data_sz)-1 DOWNTO ceil_log2(g_stat_data_sz));
     remapped_ram_st_xsq_mosi.address(c_nof_word_w -1 DOWNTO 0) <= ram_st_xsq_mosi.address(c_total_ram_addr_w -1 DOWNTO ceil_log2(c_nof_complex)+ceil_log2(g_stat_data_sz)) & ram_st_xsq_mosi.address(ceil_log2(g_stat_data_sz)-1 DOWNTO 0);
   END PROCESS;

libraries/dsp/st/tb/vhdl/tb_st_xsq.vhd

-
 -------------------------------------------------------------------------------
 --
--- Copyright (C) 2012
+-- Copyright 2021
 -- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
 -- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
 --
--- This program is free software: you can redistribute it and/or modify
--- it under the terms of the GNU General Public License as published by
--- the Free Software Foundation, either version 3 of the License, or
--- (at your option) any later version.
+-- Licensed under the Apache License, Version 2.0 (the "License");
+-- you may not use this file except in compliance with the License.
+-- You may obtain a copy of the License at
 --
--- This program is distributed in the hope that it will be useful,
--- but WITHOUT ANY WARRANTY; without even the implied warranty of
--- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--- GNU General Public License for more details.
+--     http://www.apache.org/licenses/LICENSE-2.0
 --
--- You should have received a copy of the GNU General Public License
--- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+-- Unless required by applicable law or agreed to in writing, software
+-- distributed under the License is distributed on an "AS IS" BASIS,
+-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+-- See the License for the specific language governing permissions and
+-- limitations under the License.
 --
 -------------------------------------------------------------------------------
---
+
+-------------------------------------------------------------------------------
+-- Author : R vd Walle
 -- Purpose:  Testbench for the st_xsq unit. 
 --
---
 -- Usage in non-auto-mode (c_modelsim_start = 0 in python):
 --   > as 5
 --   > run -all
---   > Run python script in separate terminal: "python tc_mmf_st_xst.py --unb 0 --bn 0 --sim"
---   > Check the results of the python script. 
---   > Stop the simulation manually in Modelsim by pressing the stop-button.
---   > Evalute the WAVE window. 
+-- Description: 
+-- The tb generates random data to feed into st_xsq. The output is compared to
+-- a pre-calculated expected array of xsq values.
+-- Remark:
+-- . More detail can be found in:
+--   https://support.astron.nl/confluence/display/L2M/L5+SDPFW+Design+Document%3A+Subband+Correlator
 
 LIBRARY IEEE, common_lib, mm_lib, diag_lib, dp_lib;
 USE IEEE.std_logic_1164.ALL;
@@ -161,12 +162,12 @@ BEGIN
     WAIT;
   END PROCESS;
 
-  in_sosi_a.sync <= st_sosi.sync;
-  in_sosi_b.sync <= st_sosi.sync;
-  in_sosi_a.sop  <= st_sosi.sop;
-  in_sosi_b.sop  <= st_sosi.sop;
-  in_sosi_a.eop  <= st_sosi.eop;
-  in_sosi_b.eop  <= st_sosi.eop;
+  in_sosi_a.sync   <= st_sosi.sync;
+  in_sosi_b.sync   <= st_sosi.sync;
+  in_sosi_a.sop    <= st_sosi.sop;
+  in_sosi_b.sop    <= st_sosi.sop;
+  in_sosi_a.eop    <= st_sosi.eop;
+  in_sosi_b.eop    <= st_sosi.eop;
   in_sosi_a.valid  <= st_sosi.valid;
   in_sosi_b.valid  <= st_sosi.valid;