When diag_en='1' then the the tx_seq data overrules the usr_sosi_arr....

When diag_en='1' then the the tx_seq data overrules the usr_sosi_arr. Dependent on g_use_usr_input the overrule now differs.

libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd

@@ -39,47 +39,55 @@
 --  |-----------------------------------------------------------------------|
 --
 -- . g_use_usr_input
---   When g_use_usr_input=TRUE then the tx_seq data overrules the usr_sosi_arr
---   input data when diag_en='1' and the usr_sosi_arr().valid sets the pace.
---   Else when g_use_usr_input=FALSE then the user input is not used and then
---   the tx_src_in_arr().ready sets the pace of the valid output data.
+--   When diag_en='1' then the the tx_seq data overrules the usr_sosi_arr. Dependent on g_use_usr_input
+--   the overule differs:
+--   
+--   1) When g_use_usr_input=TRUE then usr_sosi_arr().valid sets the pace else
+--   2) when g_use_usr_input=FALSE then tx_src_in_arr().ready sets the pace of the valid output data.
+--
+--   This scheme allows filling user data with Tx seq data using the user valid or to completely
+--   overrule the user by deriving the Tx seq valid directly from the ready.
 --
 --   g_use_usr_input=FALSE :
 --
---            g_nof_streams
---            c_latency=1
---                 .
---               ______
---              |      |
---              |diag  |<------- tx_src_in_arr().ready
---              |tx_seq|-------> tx_src_out_arr
---              |______|    .
---               __|___     .
---              |u_reg |   tx_seq_siso_arr
---              |______|   tx_seq_sosi_arr
---               __|___
---              | mux  |
---              |______|
---                 |
---      MM =================
+--                          g_nof_streams
+--                          c_latency=1
+--                               .
+--                               .
+--    usr_snk_out_arr <-------------------/------------------------------ tx_src_in_arr
+--    usr_snk_in_arr  --------------------|---------------->|\
+--                               .        |                 |0|
+--                            ______      |                 | |---------> tx_src_out_arr
+--                           |      |     |.ready           | |   
+--                           |diag  |<----/                 |1|   
+--                           |tx_seq|---------------------->|/    
+--                           |______|    .                   |
+--                            __|___     .                   |
+--                           |u_reg |   tx_seq_src_in_arr    |
+--                           |______|   tx_seq_src_out_arr   |
+--                            __|___                         |
+--                           | mux  |                     diag_en_arr
+--                           |______|
+--                              |
+--                 MM =================
 --
 --
 --   g_use_usr_input=TRUE :
 --                           g_nof_streams
 --                           c_latency=0
 --                               .
---                               .                                   ____
---    usr_snk_out_arr ----------------------------------------------|    |<-- tx_src_in
---    usr_snk_in_arr  -----------------------\---------->|\         |dp  |
---                               .           |           | |        |pipe|
---                            ______   valid |           | |------->|line|--> tx_src_out
---                           |diag  |<-------/           | |   .    |arr |
---                           |tx_seq|------------------->|/    .    |____|
---                           |______|    .                |    .
---                            __|___     .                |   mux_seq_siso_arr
---                           |u_reg |   tx_seq_siso_arr   |   mux_seq_sosi_arr
---                           |______|   tx_seq_sosi_arr   |
---                            __|___                      |
+--                               .                                     ____
+--    usr_snk_out_arr ------------------------------------------------|    |<-- tx_src_in_arr
+--    usr_snk_in_arr  -----------------------\------------>|\         |dp  |
+--                               .           |             |0|        |pipe|
+--                            ______   valid |             | |------->|line|--> tx_src_out_arr
+--                           |diag  |<-------/             |1|   .    |arr |
+--                           |tx_seq|--------------------->|/    .    |____|
+--                           |______|    .                  |    .
+--                            __|___     .                  |   mux_seq_src_in_arr
+--                           |u_reg |   tx_seq_src_in_arr   |   mux_seq_src_out_arr
+--                           |______|   tx_seq_src_out_arr  |
+--                            __|___                        |
 --                           | mux  |                    diag_en_arr
 --                           |______|
 --                              |
@@ -168,7 +176,7 @@ ENTITY mms_diag_tx_seq IS
     reg_miso        : OUT t_mem_miso;
 
     -- DP streaming interface
-    usr_snk_out_arr : OUT t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);  -- connect when g_use_usr_input=TRUE, else leave not connected
+    usr_snk_out_arr : OUT t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);
     usr_snk_in_arr  : IN  t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0) := (OTHERS=>c_dp_sosi_rst);
     tx_src_out_arr  : OUT t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
     tx_src_in_arr   : IN  t_dp_siso_arr(g_nof_streams-1 DOWNTO 0) := (OTHERS=>c_dp_siso_rdy)   -- Default xon='1';
@@ -223,12 +231,12 @@ ARCHITECTURE str OF mms_diag_tx_seq IS
 
   SIGNAL tx_replicate_dat_arr  : t_dp_data_slv_arr(g_nof_streams-1 DOWNTO 0);
 
-  SIGNAL tx_seq_siso_arr       : t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);
-  SIGNAL tx_seq_sosi_arr       : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
+  SIGNAL tx_seq_src_in_arr       : t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);
+  SIGNAL tx_seq_src_out_arr       : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
 
   -- Use user input or self generate
-  SIGNAL mux_seq_siso_arr      : t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);  -- multiplex user sosi control with tx_seq data
-  SIGNAL mux_seq_sosi_arr      : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
+  SIGNAL mux_seq_src_in_arr    : t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);  -- multiplex user sosi control with tx_seq data
+  SIGNAL mux_seq_src_out_arr   : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
 
 BEGIN
 
@@ -257,13 +265,13 @@ BEGIN
       out_val   => tx_val_arr(I)
     );
 
-    tx_req_arr(I) <= tx_seq_siso_arr(I).ready;
+    tx_req_arr(I) <= tx_seq_src_in_arr(I).ready;
 
     tx_replicate_dat_arr(I) <= REPLICATE_DP_DATA(tx_dat_arr(I));
 
-    -- for some reason the intermediate tx_replicate_dat_arr() signal is needed, otherwise the assignment to the tx_seq_sosi_arr().data field remains void in the Wave window
-    tx_seq_sosi_arr(I).data  <= tx_replicate_dat_arr(I);
-    tx_seq_sosi_arr(I).valid <= tx_val_arr(I);
+    -- for some reason the intermediate tx_replicate_dat_arr() signal is needed, otherwise the assignment to the tx_seq_src_out_arr().data field remains void in the Wave window
+    tx_seq_src_out_arr(I).data  <= tx_replicate_dat_arr(I);
+    tx_seq_src_out_arr(I).valid <= tx_val_arr(I);
 
     -- Register mapping
     diag_en_arr(I)      <= ctrl_reg_arr(I)(                             0);  -- address 0, data bit [0]
@@ -286,7 +294,7 @@ BEGIN
     u_reg : ENTITY common_lib.common_reg_r_w_dc
     GENERIC MAP (
       g_cross_clock_domain => TRUE,
-      g_readback           => FALSE,  -- must use FALSE for writdiag_en_arre/read or read only register when g_cross_clock_domain=TRUE
+      g_readback           => FALSE,  -- must use FALSE for write/read or read only register when g_cross_clock_domain=TRUE
       g_reg                => c_mm_reg
     )
     PORT MAP (
@@ -320,34 +328,46 @@ BEGIN
     miso_arr => reg_miso_arr
   );
 
-  no_usr_input : IF g_use_usr_input=FALSE GENERATE
-    tx_seq_siso_arr <= tx_src_in_arr;
-    tx_src_out_arr  <= tx_seq_sosi_arr;
+  ignore_usr_input : IF g_use_usr_input=FALSE GENERATE
+    -- flow control
+    usr_snk_out_arr   <= tx_src_in_arr;
+    tx_seq_src_in_arr <= tx_src_in_arr;
+    
+    -- data
+    p_tx_src_out_arr : PROCESS (usr_snk_in_arr, tx_seq_src_out_arr, diag_en_arr)
+    BEGIN
+      tx_src_out_arr <= usr_snk_in_arr;                -- Default pass on the usr data
+      FOR I IN 0 TO g_nof_streams-1 LOOP
+        IF diag_en_arr(I)='1' THEN
+          tx_src_out_arr(I) <= tx_seq_src_out_arr(I);  -- When diag is enabled then pass on the Tx seq data
+        END IF;
+      END LOOP;
+    END PROCESS;
   END GENERATE;
 
   use_usr_input : IF g_use_usr_input=TRUE GENERATE
     -- Request tx_seq data at user data valid rate
-    p_tx_seq_siso_arr : PROCESS(tx_seq_sosi_arr)
+    p_tx_seq_src_in_arr : PROCESS(tx_seq_src_out_arr)
     BEGIN
       FOR I IN 0 TO g_nof_streams-1 LOOP
-        tx_seq_siso_arr(I).ready <= tx_seq_sosi_arr(I).valid;
+        tx_seq_src_in_arr(I).ready <= tx_seq_src_out_arr(I).valid;
       END LOOP;
     END PROCESS;
 
     -- Default output the user input or BG data, else when tx_seq is enabled overrule output with tx_seq data
-    usr_snk_out_arr <= mux_seq_siso_arr;
+    usr_snk_out_arr <= mux_seq_src_in_arr;
 
-    p_mux_seq_sosi_arr : PROCESS (usr_snk_in_arr, tx_seq_sosi_arr, diag_en_arr)
+    p_mux_seq_src_out_arr : PROCESS (usr_snk_in_arr, tx_seq_src_out_arr, diag_en_arr)
     BEGIN
-      mux_seq_sosi_arr <= usr_snk_in_arr;
+      mux_seq_src_out_arr <= usr_snk_in_arr;
       FOR I IN 0 TO g_nof_streams-1 LOOP
         IF diag_en_arr(I)='1' THEN
-          mux_seq_sosi_arr(I).data <= tx_seq_sosi_arr(I).data;
+          mux_seq_src_out_arr(I).data <= tx_seq_src_out_arr(I).data;
         END IF;
       END LOOP;
     END PROCESS;
 
-    -- Pipeline the streams by 1 to register the mux_seq_sosi_arr data to ease timing closure given that c_tx_seq_latency=0
+    -- Pipeline the streams by 1 to register the mux_seq_src_out_arr data to ease timing closure given that c_tx_seq_latency=0
     u_dp_pipeline_arr : ENTITY dp_lib.dp_pipeline_arr
     GENERIC MAP (
       g_nof_streams => g_nof_streams
@@ -356,8 +376,8 @@ BEGIN
       rst          => dp_rst,
       clk          => dp_clk,
       -- ST sink
-      snk_out_arr  => mux_seq_siso_arr,
-      snk_in_arr   => mux_seq_sosi_arr,
+      snk_out_arr  => mux_seq_src_in_arr,
+      snk_in_arr   => mux_seq_src_out_arr,
       -- ST source
       src_in_arr   => tx_src_in_arr,
       src_out_arr  => tx_src_out_arr