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Commit 38a42bee authored by Eric Kooistra's avatar Eric Kooistra
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Add ram_equalizer_gains_cross.

parent 53332bf4
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Stage: simulation
Stage: synthesis
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applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold
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View file @ 38a42bee
......@@ -39,7 +39,84 @@ number_of_columns = 13
REG_FPGA_TEMP_SENS 1 1 REG temp 0x00018000 1 RO uint32 b[31:0] - - -
REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x00018000 6 RO uint32 b[31:0] - - -
RAM_SCRAP 1 1 RAM data 0x00020000 512 RW uint32 b[31:0] - - -
AVS_ETH_0_TSE 1 1 REG registers 0x00028000 1024 RW uint32 b[31:0] - - -
AVS_ETH_0_TSE 1 1 REG rev 0x00028000 1 RO uint32 b[31:0] - - -
- - - - scratch 0x00028004 1 RW uint32 b[31:0] - - -
- - - - command_config 0x00028008 1 RW uint32 b[31:0] - - -
- - - - mac_0 0x0002800c 1 RW uint32 b[31:0] - - -
- - - - mac_1 0x00028010 1 RW uint32 b[31:0] - - -
- - - - frm_length 0x00028014 1 RW uint32 b[31:0] - - -
- - - - pause_quant 0x00028018 1 RW uint32 b[31:0] - - -
- - - - rx_section_empty 0x0002801c 1 RW uint32 b[31:0] - - -
- - - - rx_section_full 0x00028020 1 RW uint32 b[31:0] - - -
- - - - tx_section_empty 0x00028024 1 RW uint32 b[31:0] - - -
- - - - tx_section_full 0x00028028 1 RW uint32 b[31:0] - - -
- - - - rx_almost_empty 0x0002802c 1 RW uint32 b[31:0] - - -
- - - - rx_almost_full 0x00028030 1 RW uint32 b[31:0] - - -
- - - - tx_almost_empty 0x00028034 1 RW uint32 b[31:0] - - -
- - - - tx_almost_full 0x00028038 1 RW uint32 b[31:0] - - -
- - - - mdio_addr0 0x0002803c 1 RW uint32 b[31:0] - - -
- - - - mdio_addr1 0x00028040 1 RW uint32 b[31:0] - - -
- - - - holdoff_quant 0x00028044 1 RW uint32 b[31:0] - - -
- - - - tx_ipg_length 0x0002805c 1 RW uint32 b[31:0] - - -
- - - - amacid 0x00028060 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x00028061 - - - b[31:0] b[63:32] - -
- - - - aframestransmittedok 0x00028068 1 RO uint32 b[31:0] - - -
- - - - aframesreceivedok 0x0002806c 1 RO uint32 b[31:0] - - -
- - - - aframechecksequenceerrors 0x00028070 1 RO uint32 b[31:0] - - -
- - - - aalignmenterrors 0x00028074 1 RO uint32 b[31:0] - - -
- - - - aoctetstransmittedok 0x00028078 1 RO uint32 b[31:0] - - -
- - - - aoctetsreceivedok 0x0002807c 1 RO uint32 b[31:0] - - -
- - - - atxpausemacctrlframes 0x00028080 1 RO uint32 b[31:0] - - -
- - - - arxpausemacctrlframes 0x00028084 1 RO uint32 b[31:0] - - -
- - - - ifinerrors 0x00028088 1 RO uint32 b[31:0] - - -
- - - - ifouterrors 0x0002808c 1 RO uint32 b[31:0] - - -
- - - - ifinucastpkts 0x00028090 1 RO uint32 b[31:0] - - -
- - - - ifinmulticastpkts 0x00028094 1 RO uint32 b[31:0] - - -
- - - - ifinbroadcastpkts 0x00028098 1 RO uint32 b[31:0] - - -
- - - - ifoutucastpkts 0x000280a0 1 RO uint32 b[31:0] - - -
- - - - ifoutmulticastpkts 0x000280a4 1 RO uint32 b[31:0] - - -
- - - - ifoutbroadcastpkts 0x000280a8 1 RO uint32 b[31:0] - - -
- - - - etherstatsdropevents 0x000280ac 1 RO uint32 b[31:0] - - -
- - - - etherstatsoctets 0x000280b0 1 RO uint32 b[31:0] - - -
- - - - etherstatspkts 0x000280b4 1 RO uint32 b[31:0] - - -
- - - - etherstatsundersizepkts 0x000280b8 1 RO uint32 b[31:0] - - -
- - - - etherstatsoversizepkts 0x000280bc 1 RO uint32 b[31:0] - - -
- - - - etherstatspkts64octets 0x000280c0 1 RO uint32 b[31:0] - - -
- - - - etherstatspkts65to127octets 0x000280c4 1 RO uint32 b[31:0] - - -
- - - - etherstatspkts128to255octets 0x000280c8 1 RO uint32 b[31:0] - - -
- - - - etherstatspkts256to511octets 0x000280cc 1 RO uint32 b[31:0] - - -
- - - - etherstatspkts512to1023octets 0x000280d0 1 RO uint32 b[31:0] - - -
- - - - etherstatspkts1024to1518octets 0x000280d4 1 RO uint32 b[31:0] - - -
- - - - etherstatspkts1519toxoctets 0x000280d8 1 RO uint32 b[31:0] - - -
- - - - etherstatsjabbers 0x000280dc 1 RO uint32 b[31:0] - - -
- - - - etherstatsfragments 0x000280e0 1 RO uint32 b[31:0] - - -
- - - - tx_cmd_stat 0x000280e8 1 RW uint32 b[31:0] - - -
- - - - rx_cmd_stat 0x000280ec 1 RW uint32 b[31:0] - - -
- - - - msb_aoctetstransmittedok 0x000280f0 1 RO uint32 b[31:0] - - -
- - - - msb_aoctetsreceivedok 0x000280f4 1 RO uint32 b[31:0] - - -
- - - - msb_etherstatsoctets 0x000280f8 1 RO uint32 b[31:0] - - -
- - - - pcs_control 0x00028200 1 RW uint32 b[15:0] - - -
- - - - pcs_status 0x00028204 1 RO uint32 b[15:0] - - -
- - - - pcs_phy_identifier_msb 0x00028208 1 RO uint32 b[15:0] - - -
- - - - pcs_phy_identifier_lsb 0x0002820c 1 RO uint32 b[15:0] - - -
- - - - pcs_dev_ability 0x00028210 1 RW uint32 b[15:0] - - -
- - - - pcs_partner_ability 0x00028214 1 RO uint32 b[15:0] - - -
- - - - pcs_an_expansion 0x00028218 1 RO uint32 b[15:0] - - -
- - - - pcs_scratch 0x00028240 1 RW uint32 b[15:0] - - -
- - - - pcs_rev 0x00028244 1 RO uint32 b[15:0] - - -
- - - - pcs_link_timer_lsb 0x00028248 1 RW uint32 b[15:0] - - -
- - - - pcs_link_timer_msb 0x0002824c 1 RW uint32 b[15:0] - - -
- - - - pcs_if_mode 0x00028250 1 RW uint32 b[15:0] - - -
- - - - tx_period 0x00028340 1 RW uint32 b[31:0] - - -
- - - - tx_adjust_fns 0x00028344 1 RW uint32 b[15:0] - - -
- - - - tx_adjust_ns 0x00028348 1 RW uint32 b[15:0] - - -
- - - - rx_period 0x0002834c 1 RW uint32 b[31:0] - - -
- - - - rx_adjust_fns 0x00028350 1 RW uint32 b[15:0] - - -
- - - - rx_adjust_ns 0x00028354 1 RW uint32 b[15:0] - - -
- - - - measure_valid 0x00028384 1 RO uint32 b[0:0] - - -
- - - - dl_reset 0x00028384 1 RW uint32 b[1:1] - - -
- - - - tx_delay 0x00028388 1 RO uint32 b[20:0] - - -
- - - - rx_delay 0x0002838c 1 RO uint32 b[20:0] - - -
AVS_ETH_0_REG 1 1 REG demux 0x00028000 4 RW uint32 b[16:0] - - -
- - - - config_mac_address 0x00028004 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x00028005 - - - b[15:0] b[47:32] - -
......@@ -186,6 +263,7 @@ number_of_columns = 13
REG_SI 1 1 REG enable 0x000b8000 1 RW uint32 b[11:0] - - -
RAM_FIL_COEFS 2 16 RAM data 0x000c0000 1024 RW uint32 b[15:0] - 16384 1024
RAM_EQUALIZER_GAINS 1 12 RAM data 0x000c8000 1024 RW cint16_ir b[31:0] - - 1024
RAM_EQUALIZER_GAINS_CROSS 1 12 RAM data 0x000cc000 1024 RW cint16_ir b[31:0] - - 1024
REG_DP_SELECTOR 1 1 REG input_select 0x000d0000 1 RW uint32 b[0:0] - - -
RAM_ST_SST 1 12 RAM data 0x000d8000 1024 RW uint64 b[31:0] b[31:0] - 2048
- - - - - 0x000d8001 - - - b[21:0] b[53:32] - -
......
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