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Commit 33e45e00 authored by Reinier van der Walle's avatar Reinier van der Walle
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Cleanup

parent 25c7713b
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3 merge requests!100Removed text for XSub that is now written in Confluence Subband correlator...,!43Master,!42Resolve L2SDP-104
......@@ -75,18 +75,18 @@ ARCHITECTURE tb OF tb_lofar2_unb2b_adc_wg IS
CONSTANT c_bck_ref_clk_period : TIME := 5 ns;
CONSTANT c_pps_period : NATURAL := 1000;
CONSTANT c_tb_clk_period : TIME := 100 ps; -- use fast tb_clk and internal mm_clk to speed up M&C
CONSTANT c_tb_clk_period : TIME := 100 ps; -- use fast tb_clk to speed up M&C
CONSTANT c_cable_delay : TIME := 12 ns
;
CONSTANT c_sample_freq : NATURAL := c_unb2b_board_ext_clk_freq_200M/10**6; -- 200 MSps
CONSTANT c_sample_period : TIME := (10**6 / c_sample_freq) * 1 ps;
CONSTANT c_nof_sync : NATURAL := 5;
CONSTANT c_nof_block_per_sync : NATURAL := 16;
-- choose > time to read all subband statistics (dependent on tb_clk and mm_clk rate)
CONSTANT c_nof_block_per_sync : NATURAL := 16;
CONSTANT c_percentage : REAL := 0.05; -- percentage that actual value may differ from expected value
CONSTANT c_lo_factor : REAL := 1.0 - c_percentage; -- lower boundary -- choose multiple of nof_taps=16 to have exactly same subband statistics every sync interval
CONSTANT c_hi_factor : REAL := 1.0 + c_percentage; -- higher boundary -- choose multiple of nof_taps=16 to have exactly same subband statistics every sync interval
CONSTANT c_lo_factor : REAL := 1.0 - c_percentage; -- lower boundary
CONSTANT c_hi_factor : REAL := 1.0 + c_percentage; -- higher boundary
CONSTANT c_nof_points : NATURAL := 1024;
CONSTANT c_nof_taps : NATURAL := 16;
......@@ -97,17 +97,16 @@ ARCHITECTURE tb OF tb_lofar2_unb2b_adc_wg IS
CONSTANT c_full_scale_ampl : REAL := REAL(2**(18-1)-1); -- = full scale of WG
CONSTANT c_bsn_start_wg : NATURAL := 2; -- start WG at this BSN to instead of some BSN, to avoid mismatches in exact expected data values
CONSTANT c_ampl_sp : NATURAL := 2**(14-1)/2; -- in number of lsb
CONSTANT c_subband_sp : REAL := 51.2; -- first select subband at index 512/10 = 51.2 = 20 MHz
CONSTANT c_subband_sp : REAL := 51.2; -- Select subband at index 512/10 = 51.2 = 20 MHz
CONSTANT c_wg_subband_freq_unit : REAL := c_diag_wg_freq_unit/512.0; -- subband freq = Fs/512 = 200 MSps/512 = 390625 Hz sinus
CONSTANT c_wg_ampl_lsb : REAL := c_diag_wg_ampl_unit / c_full_scale_ampl; -- amplitude in number of LSbit resolution steps, so 1:127
CONSTANT c_wg_ampl_lsb : REAL := c_diag_wg_ampl_unit / c_full_scale_ampl; -- amplitude in number of LSbit resolution steps
CONSTANT c_exp_wg_power_sp : REAL := REAL(c_ampl_sp**2)/2.0 * REAL(c_nof_points*c_nof_block_per_sync);
-- ADUH
CONSTANT c_mon_buffer_nof_samples : NATURAL := 1024; --samples per stream in 256 words
CONSTANT c_mon_buffer_nof_words : NATURAL := c_mon_buffer_nof_samples; -- = 256
CONSTANT c_mon_buffer_nof_samples : NATURAL := 1024; --samples per stream
CONSTANT c_mon_buffer_nof_words : NATURAL := c_mon_buffer_nof_samples;
-- MM
CONSTANT c_cross_clock_domain_delay : NATURAL := 50; -- ext_clk cycles, assuming internal mm_clk is faster than ext_clk in sim
CONSTANT c_mm_file_reg_ppsh : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "PIO_PPS";
CONSTANT c_mm_file_reg_bsn_source : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "REG_BSN_SOURCE";
CONSTANT c_mm_file_reg_bsn_scheduler_wg : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "REG_BSN_SCHEDULER";
......@@ -124,7 +123,7 @@ ARCHITECTURE tb OF tb_lofar2_unb2b_adc_wg IS
-- WG
SIGNAL dbg_c_exp_wg_power_sp : REAL := c_exp_wg_power_sp;
SIGNAL sp_samples : t_integer_arr(0 TO c_mon_buffer_nof_samples-1) := (OTHERS=>0); -- 1024 samples per stream in 256 words
SIGNAL sp_samples : t_integer_arr(0 TO c_mon_buffer_nof_samples-1) := (OTHERS=>0);
SIGNAL sp_sample : INTEGER := 0;
SIGNAL sp_power_sum : UNSIGNED(63 DOWNTO 0);
SIGNAL current_bsn_wg : STD_LOGIC_VECTOR(c_dp_stream_bsn_w-1 DOWNTO 0);
......@@ -229,13 +228,6 @@ BEGIN
JESD204B_SYNC_N => jesd204b_sync_n
);
------------------------------------------------------------------------------
-- Serial loopback models
------------------------------------------------------------------------------
-- 1 GbE
eth_rxp <= TRANSPORT eth_txp AFTER c_cable_delay;
------------------------------------------------------------------------------
-- MM slave accesses via file IO
------------------------------------------------------------------------------
......@@ -257,7 +249,6 @@ BEGIN
mmf_mm_bus_wr(c_mm_file_reg_bsn_source, 2, 0, tb_clk); -- Init BSN = 0
mmf_mm_bus_wr(c_mm_file_reg_bsn_source, 1, c_nof_block_per_sync, tb_clk); -- nof_block_per_sync
mmf_mm_bus_wr(c_mm_file_reg_bsn_source, 0, 16#00000003#, tb_clk); -- Enable BS at PPS
proc_common_wait_some_cycles(ext_clk, c_cross_clock_domain_delay);
----------------------------------------------------------------------------
-- Enable WG
......@@ -269,7 +260,7 @@ BEGIN
-- 3 : ampl[16:0]
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 0, 1024*2**16 + 1, tb_clk); -- nof_samples, mode calc
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 1, INTEGER( 0.0 * c_diag_wg_phase_unit), tb_clk); -- phase offset in degrees
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 2, INTEGER(c_subband_sp * c_wg_subband_freq_unit), tb_clk); -- freq: first select subband at index 64 = 50 MHz
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 2, INTEGER(c_subband_sp * c_wg_subband_freq_unit), tb_clk); -- freq
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 3, INTEGER(REAL(c_ampl_sp) * c_wg_ampl_lsb), tb_clk); -- ampl
-- Read current BSN
......@@ -301,7 +292,7 @@ BEGIN
-- Read via MM
FOR I IN 0 TO c_mon_buffer_nof_words-1 LOOP
mmf_mm_bus_rd(c_mm_file_ram_aduh_mon, I, rd_data, tb_clk);
sp_samples(I) <= TO_SINT(rd_data(15 DOWNTO 0)); -- big endian [31:0] = [t0, t1, t2, t3]
sp_samples(I) <= TO_SINT(rd_data(15 DOWNTO 0));
END LOOP;
-- Play to have waveform in time to allow viewing as analogue in the Wave Window
......
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