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Commit 2d1fcdf2 authored by Eric Kooistra's avatar Eric Kooistra
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Support applying SI per signal input.

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1 merge request!296Support applying SI per signal input.
Pipeline #40810 passed
This commit is part of merge request !296. Comments created here will be created in the context of that merge request.
......@@ -183,7 +183,7 @@ number_of_columns = 13
REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x000b0000 1 RO uint32 b[31:0] - - 2
- - - - word_cnt 0x000b0001 1 RO uint32 b[31:0] - - -
RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x000b4000 1024 RW uint32 b[31:0] b[15:0] - 1024
REG_SI 1 1 REG enable 0x000b8000 1 RW uint32 b[0:0] - - -
REG_SI 1 1 REG enable 0x000b8000 1 RW uint32 b[11:0] - - -
RAM_FIL_COEFS 2 16 RAM data 0x000c0000 1024 RW uint32 b[15:0] - 16384 1024
RAM_EQUALIZER_GAINS 1 12 RAM data 0x000c8000 1024 RW cint16_ir b[31:0] - - 1024
REG_DP_SELECTOR 1 1 REG input_select 0x000d0000 1 RW uint32 b[0:0] - - -
......
......@@ -183,7 +183,7 @@ number_of_columns = 13
REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x0004d1a0 1 RO uint32 b[31:0] - - 2
- - - - word_cnt 0x0004d1a1 1 RO uint32 b[31:0] - - -
RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00200000 1024 RW uint32 b[31:0] b[15:0] - 1024
REG_SI 1 1 REG enable 0x0004d2fa 1 RW uint32 b[0:0] - - -
REG_SI 1 1 REG enable 0x0004d2fa 1 RW uint32 b[11:0] - - -
RAM_FIL_COEFS 2 16 RAM data 0x00030000 1024 RW uint32 b[15:0] - 16384 1024
RAM_EQUALIZER_GAINS 1 12 RAM data 0x00040000 1024 RW cint16_ir b[31:0] - - 1024
REG_DP_SELECTOR 1 1 REG input_select 0x0004d2f6 1 RW uint32 b[0:0] - - -
......
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