Changed mult from common_lib to common_mult_lib

libraries/dsp/filter/src/vhdl/fil_ppf_filter.vhd

@@ -27,9 +27,10 @@
 -- Remarks:    .
 --              
 
-library IEEE, common_lib;
+library IEEE, common_lib, common_mult_lib, technology_lib;
 use IEEE.std_logic_1164.ALL;
 use IEEE.numeric_std.ALL;
+USE technology_lib.technology_select_pkg.ALL;
 use common_lib.common_pkg.ALL; 
 use work.fil_pkg.ALL;
 
@@ -49,6 +50,8 @@ end fil_ppf_filter;
 
 architecture rtl of fil_ppf_filter is 
 
+  CONSTANT c_technology     : NATURAL := c_tech_select_default;
+
   constant c_prod_w         : natural := g_fil_ppf.in_dat_w + g_fil_ppf.coef_dat_w - c_sign_w;    -- skip double sign bit
   constant c_gain_w         : natural := 0;   -- no need for adder bit growth so fixed 0, because filter coefficients should have DC gain <= 1.
                                               -- The adder tree bit growth depends on DC gain of FIR coefficients, not on ceil_log2(g_fil_ppf.nof_taps).
@@ -70,8 +73,10 @@ begin
   -- For every tap a unique multiplier is instantiated that 
   -- multiplies the data tap with the corresponding filter coefficient
   gen_multipliers : for I in 0 to g_fil_ppf.nof_taps-1 generate                                                                            
-    u_multiplier : entity common_lib.common_mult(stratix4)
+    u_multiplier : entity common_mult_lib.common_mult
     generic map (
+      g_technology       => c_technology,
+      g_variant          => "IP",
       g_in_a_w           => g_fil_ppf.in_dat_w,   
       g_in_b_w           => g_fil_ppf.coef_dat_w, 
       g_out_p_w          => c_prod_w,