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Commit 2640914a authored by Eric Kooistra's avatar Eric Kooistra
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Merge branch 'L2SDP-455' of git.astron.nl:desp/hdl into L2SDP-455

parents 9344c8c3 1ecb0434
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1 merge request!134Resolve L2SDP-455
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applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/qsys_lofar2_unb2b_sdp_station.qsys
+ 40
− 40
View file @ 2640914a
......@@ -99,7 +99,7 @@
{
datum baseAddress
{
value = "737752";
value = "737760";
type = "String";
}
}
......@@ -144,7 +144,7 @@
{
datum baseAddress
{
value = "737672";
value = "737688";
type = "String";
}
}
......@@ -157,7 +157,7 @@
}
datum sopceditor_expanded
{
value = "0";
value = "1";
type = "boolean";
}
}
......@@ -165,7 +165,7 @@
{
datum baseAddress
{
value = "737744";
value = "737648";
type = "String";
}
}
......@@ -426,7 +426,7 @@
{
datum baseAddress
{
value = "737696";
value = "737712";
type = "String";
}
}
......@@ -442,7 +442,7 @@
{
datum baseAddress
{
value = "737648";
value = "737664";
type = "String";
}
}
......@@ -506,7 +506,7 @@
{
datum baseAddress
{
value = "737688";
value = "737704";
type = "String";
}
}
......@@ -538,7 +538,7 @@
{
datum baseAddress
{
value = "737656";
value = "737672";
type = "String";
}
}
......@@ -575,7 +575,7 @@
{
datum baseAddress
{
value = "737736";
value = "737752";
type = "String";
}
}
......@@ -596,7 +596,7 @@
{
datum baseAddress
{
value = "737728";
value = "737744";
type = "String";
}
}
......@@ -691,7 +691,7 @@
{
datum baseAddress
{
value = "737720";
value = "737736";
type = "String";
}
}
......@@ -712,7 +712,7 @@
{
datum baseAddress
{
value = "737712";
value = "737728";
type = "String";
}
}
......@@ -728,7 +728,7 @@
{
datum baseAddress
{
value = "737680";
value = "737696";
type = "String";
}
}
......@@ -797,7 +797,7 @@
{
datum baseAddress
{
value = "737704";
value = "737720";
type = "String";
}
}
......@@ -829,7 +829,7 @@
{
datum baseAddress
{
value = "737664";
value = "737680";
type = "String";
}
}
......@@ -1291,11 +1291,6 @@
internal="pio_wdi.external_connection"
type="conduit"
dir="end" />
<interface
name="reg_stat_hdr_dat_xst_readdata"
internal="reg_stat_hdr_dat_xst.readdata"
type="conduit"
dir="end" />
<interface
name="ram_bf_weights_address"
internal="ram_bf_weights.address"
......@@ -2671,6 +2666,11 @@
internal="reg_stat_hdr_dat_xst.read"
type="conduit"
dir="end" />
<interface
name="reg_stat_hdr_dat_xst_readdata"
internal="reg_stat_hdr_dat_xst.readdata"
type="conduit"
dir="end" />
<interface
name="reg_stat_hdr_dat_xst_reset"
internal="reg_stat_hdr_dat_xst.reset"
......@@ -5805,7 +5805,7 @@
<consumedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buffer_bsn.mem' start='0x80' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_xst.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_bst.mem' start='0x200' end='0x400' datawidth='32' /&gt;&lt;slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_xst.mem' start='0x3008' end='0x3010' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /&gt;&lt;slave name='reg_dp_shiftram.mem' start='0x3080' end='0x3100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_sst.mem' start='0x3100' end='0x3200' datawidth='32' /&gt;&lt;slave name='reg_hdr_dat.mem' start='0x3200' end='0x3400' datawidth='32' /&gt;&lt;slave name='reg_wg.mem' start='0x3400' end='0x3500' datawidth='32' /&gt;&lt;slave name='reg_aduh_monitor.mem' start='0x3500' end='0x3600' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x3600' end='0x3700' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x3700' end='0x3800' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /&gt;&lt;slave name='ram_equalizer_gains.mem' start='0x18000' end='0x20000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /&gt;&lt;slave name='ram_st_xsq.mem' start='0x60000' end='0x70000' datawidth='32' /&gt;&lt;slave name='ram_ss_ss_wide.mem' start='0x70000' end='0x80000' datawidth='32' /&gt;&lt;slave name='ram_wg.mem' start='0x80000' end='0x90000' datawidth='32' /&gt;&lt;slave name='ram_fil_coefs.mem' start='0x90000' end='0xA0000' datawidth='32' /&gt;&lt;slave name='ram_st_sst.mem' start='0xA0000' end='0xB0000' datawidth='32' /&gt;&lt;slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /&gt;&lt;slave name='reg_crosslets_info.mem' start='0xB4000' end='0xB4040' datawidth='32' /&gt;&lt;slave name='reg_sdp_info.mem' start='0xB4040' end='0xB4080' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0xB4080' end='0xB40C0' datawidth='32' /&gt;&lt;slave name='reg_bsn_source_v2.mem' start='0xB40C0' end='0xB40E0' datawidth='32' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0xB40E0' end='0xB4100' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0xB4100' end='0xB4120' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0xB4120' end='0xB4140' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_bst.mem' start='0xB4140' end='0xB4150' datawidth='32' /&gt;&lt;slave name='reg_dp_xonoff.mem' start='0xB4150' end='0xB4160' datawidth='32' /&gt;&lt;slave name='reg_bf_scale.mem' start='0xB4160' end='0xB4170' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler_xsub.mem' start='0xB4170' end='0xB4178' datawidth='32' /&gt;&lt;slave name='reg_dp_sync_insert_v2.mem' start='0xB4178' end='0xB4180' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_sst.mem' start='0xB4180' end='0xB4188' datawidth='32' /&gt;&lt;slave name='pio_jesd_ctrl.mem' start='0xB4188' end='0xB4190' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_eth10g.mem' start='0xB4190' end='0xB4198' datawidth='32' /&gt;&lt;slave name='reg_dp_selector.mem' start='0xB4198' end='0xB41A0' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler.mem' start='0xB41A0' end='0xB41A8' datawidth='32' /&gt;&lt;slave name='reg_si.mem' start='0xB41A8' end='0xB41B0' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0xB41B0' end='0xB41B8' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0xB41B8' end='0xB41C0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0xB41C0' end='0xB41C8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0xB41C8' end='0xB41D0' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0xB41D0' end='0xB41D8' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0xB41D8' end='0xB41E0' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buffer_bsn.mem' start='0x80' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_xst.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_bst.mem' start='0x200' end='0x400' datawidth='32' /&gt;&lt;slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_xst.mem' start='0x3008' end='0x3010' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /&gt;&lt;slave name='reg_dp_shiftram.mem' start='0x3080' end='0x3100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_sst.mem' start='0x3100' end='0x3200' datawidth='32' /&gt;&lt;slave name='reg_hdr_dat.mem' start='0x3200' end='0x3400' datawidth='32' /&gt;&lt;slave name='reg_wg.mem' start='0x3400' end='0x3500' datawidth='32' /&gt;&lt;slave name='reg_aduh_monitor.mem' start='0x3500' end='0x3600' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x3600' end='0x3700' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x3700' end='0x3800' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /&gt;&lt;slave name='ram_equalizer_gains.mem' start='0x18000' end='0x20000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /&gt;&lt;slave name='ram_st_xsq.mem' start='0x60000' end='0x70000' datawidth='32' /&gt;&lt;slave name='ram_ss_ss_wide.mem' start='0x70000' end='0x80000' datawidth='32' /&gt;&lt;slave name='ram_wg.mem' start='0x80000' end='0x90000' datawidth='32' /&gt;&lt;slave name='ram_fil_coefs.mem' start='0x90000' end='0xA0000' datawidth='32' /&gt;&lt;slave name='ram_st_sst.mem' start='0xA0000' end='0xB0000' datawidth='32' /&gt;&lt;slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /&gt;&lt;slave name='reg_crosslets_info.mem' start='0xB4000' end='0xB4040' datawidth='32' /&gt;&lt;slave name='reg_sdp_info.mem' start='0xB4040' end='0xB4080' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0xB4080' end='0xB40C0' datawidth='32' /&gt;&lt;slave name='reg_bsn_source_v2.mem' start='0xB40C0' end='0xB40E0' datawidth='32' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0xB40E0' end='0xB4100' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0xB4100' end='0xB4120' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0xB4120' end='0xB4140' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_bst.mem' start='0xB4140' end='0xB4150' datawidth='32' /&gt;&lt;slave name='reg_dp_xonoff.mem' start='0xB4150' end='0xB4160' datawidth='32' /&gt;&lt;slave name='reg_bf_scale.mem' start='0xB4160' end='0xB4170' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0xB4170' end='0xB4180' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler_xsub.mem' start='0xB4180' end='0xB4188' datawidth='32' /&gt;&lt;slave name='reg_dp_sync_insert_v2.mem' start='0xB4188' end='0xB4190' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_sst.mem' start='0xB4190' end='0xB4198' datawidth='32' /&gt;&lt;slave name='pio_jesd_ctrl.mem' start='0xB4198' end='0xB41A0' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_eth10g.mem' start='0xB41A0' end='0xB41A8' datawidth='32' /&gt;&lt;slave name='reg_dp_selector.mem' start='0xB41A8' end='0xB41B0' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler.mem' start='0xB41B0' end='0xB41B8' datawidth='32' /&gt;&lt;slave name='reg_si.mem' start='0xB41B8' end='0xB41C0' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0xB41C0' end='0xB41C8' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0xB41C8' end='0xB41D0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0xB41D0' end='0xB41D8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0xB41D8' end='0xB41E0' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0xB41E0' end='0xB41E8' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
......@@ -8448,7 +8448,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
<width>2</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
......@@ -8512,7 +8512,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
<width>1</width>
<width>2</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
......@@ -8581,7 +8581,7 @@
</entry>
<entry>
<key>addressSpan</key>
<value>8</value>
<value>16</value>
</entry>
<entry>
<key>addressUnits</key>
......@@ -8987,11 +8987,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
<value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x10' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
<value>3</value>
<value>4</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
......@@ -39356,7 +39356,7 @@
version="18.0"
start="cpu_0.data_master"
end="jtag_uart_0.avalon_jtag_slave">
<parameter name="baseAddress" value="0x000b41d8" />
<parameter name="baseAddress" value="0x000b41e0" />
</connection>
<connection
kind="avalon"
......@@ -39391,7 +39391,7 @@
version="18.0"
start="cpu_0.data_master"
end="pio_pps.mem">
<parameter name="baseAddress" value="0x000b41d0" />
<parameter name="baseAddress" value="0x000b4170" />
</connection>
<connection
kind="avalon"
......@@ -39419,28 +39419,28 @@
version="18.0"
start="cpu_0.data_master"
end="reg_dpmm_ctrl.mem">
<parameter name="baseAddress" value="0x000b41c8" />
<parameter name="baseAddress" value="0x000b41d8" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_dpmm_data.mem">
<parameter name="baseAddress" value="0x000b41c0" />
<parameter name="baseAddress" value="0x000b41d0" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_mmdp_ctrl.mem">
<parameter name="baseAddress" value="0x000b41b8" />
<parameter name="baseAddress" value="0x000b41c8" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_mmdp_data.mem">
<parameter name="baseAddress" value="0x000b41b0" />
<parameter name="baseAddress" value="0x000b41c0" />
</connection>
<connection
kind="avalon"
......@@ -39475,7 +39475,7 @@
version="18.0"
start="cpu_0.data_master"
end="reg_si.mem">
<parameter name="baseAddress" value="0x000b41a8" />
<parameter name="baseAddress" value="0x000b41b8" />
</connection>
<connection
kind="avalon"
......@@ -39517,7 +39517,7 @@
version="18.0"
start="cpu_0.data_master"
end="reg_bsn_scheduler.mem">
<parameter name="baseAddress" value="0x000b41a0" />
<parameter name="baseAddress" value="0x000b41b0" />
</connection>
<connection
kind="avalon"
......@@ -39552,7 +39552,7 @@
version="18.0"
start="cpu_0.data_master"
end="reg_dp_selector.mem">
<parameter name="baseAddress" value="0x000b4198" />
<parameter name="baseAddress" value="0x000b41a8" />
</connection>
<connection
kind="avalon"
......@@ -39615,7 +39615,7 @@
version="18.0"
start="cpu_0.data_master"
end="reg_nw_10gbe_eth10g.mem">
<parameter name="baseAddress" value="0x000b4190" />
<parameter name="baseAddress" value="0x000b41a0" />
</connection>
<connection
kind="avalon"
......@@ -39643,14 +39643,14 @@
version="18.0"
start="cpu_0.data_master"
end="pio_jesd_ctrl.mem">
<parameter name="baseAddress" value="0x000b4188" />
<parameter name="baseAddress" value="0x000b4198" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_stat_enable_sst.mem">
<parameter name="baseAddress" value="0x000b4180" />
<parameter name="baseAddress" value="0x000b4190" />
</connection>
<connection
kind="avalon"
......@@ -39678,7 +39678,7 @@
version="18.0"
start="cpu_0.data_master"
end="reg_dp_sync_insert_v2.mem">
<parameter name="baseAddress" value="0x000b4178" />
<parameter name="baseAddress" value="0x000b4188" />
</connection>
<connection
kind="avalon"
......@@ -39692,7 +39692,7 @@
version="18.0"
start="cpu_0.data_master"
end="reg_bsn_scheduler_xsub.mem">
<parameter name="baseAddress" value="0x000b4170" />
<parameter name="baseAddress" value="0x000b4180" />
</connection>
<connection
kind="avalon"
applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd
+ 1
− 1
View file @ 2640914a
......@@ -62,7 +62,7 @@ PACKAGE qsys_lofar2_unb2b_sdp_station_pkg IS
pio_jesd_ctrl_reset_export : out std_logic; -- export
pio_jesd_ctrl_write_export : out std_logic; -- export
pio_jesd_ctrl_writedata_export : out std_logic_vector(31 downto 0); -- export
pio_pps_address_export : out std_logic_vector(0 downto 0); -- export
pio_pps_address_export : out std_logic_vector(1 downto 0); -- export
pio_pps_clk_export : out std_logic; -- export
pio_pps_read_export : out std_logic; -- export
pio_pps_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
......
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