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Commit 2160f29b authored by Reinier van der Walle's avatar Reinier van der Walle
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Added scrap RAM to ctrl_unb2b_board and added scrap RAM MM component to 

qsys of unb2b_minimal
parent 3fb02dcf
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2 merge requests!28Master,!17Resolve L2SDP-66
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boards/uniboard2b/designs/unb2b_minimal/hdllib.cfg
+ 1
− 0
View file @ 2160f29b
......@@ -58,6 +58,7 @@ quartus_ip_files =
$RADIOHDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_wdi.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_rom_system_info.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_timer_0.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_ram_scrap.ip
nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
boards/uniboard2b/designs/unb2b_minimal/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_cpu_0.ip
+ 6
− 6
View file @ 2160f29b
......@@ -2073,7 +2073,7 @@
<spirit:parameter>
<spirit:name>breakAbsoluteAddr</spirit:name>
<spirit:displayName>Break vector</spirit:displayName>
<spirit:value spirit:format="long" spirit:id="breakAbsoluteAddr">14368</spirit:value>
<spirit:value spirit:format="long" spirit:id="breakAbsoluteAddr">20512</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>mmu_TLBMissExcAbsAddr</spirit:name>
......@@ -2208,7 +2208,7 @@
<spirit:parameter>
<spirit:name>instSlaveMapParam</spirit:name>
<spirit:displayName>instSlaveMapParam</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="instSlaveMapParam"><![CDATA[<address-map><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map>]]></spirit:value>
<spirit:value spirit:format="string" spirit:id="instSlaveMapParam"><![CDATA[<address-map><slave name='cpu_0.debug_mem_slave' start='0x5000' end='0x5800' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map>]]></spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>faSlaveMapParam</spirit:name>
......@@ -2218,7 +2218,7 @@
<spirit:parameter>
<spirit:name>dataSlaveMapParam</spirit:name>
<spirit:displayName>dataSlaveMapParam</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /><slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /><slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /><slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /><slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /><slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /><slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x4000' end='0x5000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map>]]></spirit:value>
<spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /><slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /><slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /><slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /><slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /><slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /><slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='ram_scrap.mem' start='0x3800' end='0x4000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x4000' end='0x5000' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x5000' end='0x5800' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map>]]></spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name>
......@@ -2344,7 +2344,7 @@
</spirit:parameter>
<spirit:parameter>
<spirit:name>embeddedsw.CMacro.BREAK_ADDR</spirit:name>
<spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.BREAK_ADDR">0x00003820</spirit:value>
<spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.BREAK_ADDR">0x00005020</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>embeddedsw.CMacro.CPU_ARCH_NIOS2_R1</spirit:name>
......@@ -3489,7 +3489,7 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x4000' end='0x5000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x4000' end='0x5000' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x5000' end='0x5800' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
......@@ -3527,7 +3527,7 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
<value>&lt;address-map&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x5000' end='0x5800' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
......
boards/uniboard2b/designs/unb2b_minimal/src/vhdl/mmm_unb2b_minimal.vhd
+ 17
− 2
View file @ 2160f29b
......@@ -97,7 +97,11 @@ ENTITY mmm_unb2b_minimal IS
-- Remote Update
reg_remu_mosi : OUT t_mem_mosi;
reg_remu_miso : IN t_mem_miso
reg_remu_miso : IN t_mem_miso;
-- Scrap RAM
ram_scrap_mosi : OUT t_mem_mosi;
ram_scrap_miso : IN t_mem_miso
);
END mmm_unb2b_minimal;
......@@ -139,6 +143,9 @@ BEGIN
u_mm_file_reg_ppsh : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "PIO_PPS")
PORT MAP(mm_rst, mm_clk, reg_ppsh_mosi, reg_ppsh_miso );
u_mm_file_ram_scrap : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "RAM_SCRAP")
PORT MAP(mm_rst, mm_clk, ram_scrap_mosi, ram_scrap_miso );
-- Note: the eth1g RAM and TSE buses are only required by unb_osy on the NIOS as they provide the ethernet<->MM gateway.
u_mm_file_reg_eth : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "AVS_ETH_0_MMS_REG")
PORT MAP(mm_rst, mm_clk, eth1g_reg_mosi, eth1g_reg_miso );
......@@ -296,7 +303,15 @@ BEGIN
reg_mmdp_ctrl_read_export => reg_mmdp_ctrl_mosi.rd,
reg_mmdp_ctrl_readdata_export => reg_mmdp_ctrl_miso.rddata(c_word_w-1 DOWNTO 0),
reg_mmdp_ctrl_write_export => reg_mmdp_ctrl_mosi.wr,
reg_mmdp_ctrl_writedata_export => reg_mmdp_ctrl_mosi.wrdata(c_word_w-1 DOWNTO 0)
reg_mmdp_ctrl_writedata_export => reg_mmdp_ctrl_mosi.wrdata(c_word_w-1 DOWNTO 0),
ram_scrap_reset_export => OPEN,
ram_scrap_clk_export => OPEN,
ram_scrap_address_export => ram_scrap_mosi.address(8 DOWNTO 0),
ram_scrap_write_export => ram_scrap_mosi.wr,
ram_scrap_writedata_export => ram_scrap_mosi.wrdata(c_word_w-1 DOWNTO 0),
ram_scrap_read_export => ram_scrap_mosi.rd,
ram_scrap_readdata_export => ram_scrap_miso.rddata(c_word_w-1 DOWNTO 0)
);
END GENERATE;
......
boards/uniboard2b/designs/unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd
+ 7
− 0
View file @ 2160f29b
......@@ -65,6 +65,13 @@ PACKAGE qsys_unb2b_minimal_pkg IS
pio_system_info_write_export : out std_logic; -- export
pio_system_info_writedata_export : out std_logic_vector(31 downto 0); -- export
pio_wdi_external_connection_export : out std_logic; -- export
ram_scrap_address_export : out std_logic_vector(8 downto 0); -- export
ram_scrap_clk_export : out std_logic; -- export
ram_scrap_read_export : out std_logic; -- export
ram_scrap_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
ram_scrap_reset_export : out std_logic; -- export
ram_scrap_write_export : out std_logic; -- export
ram_scrap_writedata_export : out std_logic_vector(31 downto 0); -- export
reg_dpmm_ctrl_address_export : out std_logic_vector(0 downto 0); -- export
reg_dpmm_ctrl_clk_export : out std_logic; -- export
reg_dpmm_ctrl_read_export : out std_logic; -- export
......
boards/uniboard2b/designs/unb2b_minimal/src/vhdl/unb2b_minimal.vhd
+ 13
− 1
View file @ 2160f29b
......@@ -151,6 +151,10 @@ ARCHITECTURE str OF unb2b_minimal IS
SIGNAL reg_remu_mosi : t_mem_mosi;
SIGNAL reg_remu_miso : t_mem_miso;
-- Scrap RAM
SIGNAL ram_scrap_mosi : t_mem_mosi;
SIGNAL ram_scrap_miso : t_mem_miso;
-- QSFP leds
SIGNAL qsfp_green_led_arr : STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.nof_bus-1 DOWNTO 0);
SIGNAL qsfp_red_led_arr : STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.nof_bus-1 DOWNTO 0);
......@@ -253,6 +257,10 @@ BEGIN
eth1g_ram_mosi => eth1g_ram_mosi,
eth1g_ram_miso => eth1g_ram_miso,
-- scrap ram
ram_scrap_mosi => ram_scrap_mosi,
ram_scrap_miso => ram_scrap_miso,
-- FPGA pins
-- . General
CLK => CLK,
......@@ -349,7 +357,11 @@ BEGIN
-- Remote Update
reg_remu_mosi => reg_remu_mosi,
reg_remu_miso => reg_remu_miso
reg_remu_miso => reg_remu_miso,
-- Scrap RAM
ram_scrap_mosi => ram_scrap_mosi,
ram_scrap_miso => ram_scrap_miso
);
u_front_led : ENTITY unb2b_board_lib.unb2b_board_qsfp_leds
......
boards/uniboard2b/libraries/unb2b_board/src/vhdl/ctrl_unb2b_board.vhd
+ 23
− 1
View file @ 2160f29b
......@@ -213,6 +213,11 @@ ENTITY ctrl_unb2b_board IS
udp_rx_sosi_arr : OUT t_dp_sosi_arr(g_udp_offload_nof_streams-1 DOWNTO 0);
udp_rx_siso_arr : IN t_dp_siso_arr(g_udp_offload_nof_streams-1 DOWNTO 0) := (OTHERS=>c_dp_siso_rdy);
-- Scrap RAM
ram_scrap_mosi : IN t_mem_mosi;
ram_scrap_miso : OUT t_mem_miso;
--
-- >>> Ctrl FPGA pins
--
......@@ -256,6 +261,7 @@ ARCHITECTURE str OF ctrl_unb2b_board IS
CONSTANT c_reset_len : NATURAL := 4; -- >= c_meta_delay_len from common_pkg
CONSTANT c_mm_clk_freq : NATURAL := sel_a_b(g_sim=FALSE,g_mm_clk_freq,c_unb2b_board_mm_clk_freq_10M);
CONSTANT c_ram_scrap : t_c_mem := (c_mem_ram_rd_latency, 9, 32, 2**9, 'X');
-- Clock and reset
SIGNAL i_ext_clk200 : STD_LOGIC;
......@@ -816,4 +822,20 @@ BEGIN
);
END GENERATE;
u_ram_scrap : ENTITY common_lib.common_ram_r_w
GENERIC MAP (
g_ram => c_ram_scrap
)
PORT MAP (
rst => i_mm_rst,
clk => i_mm_clk,
wr_en => ram_scrap_mosi.wr,
wr_adr => ram_scrap_mosi.address(c_ram_scrap.adr_w-1 DOWNTO 0),
wr_dat => ram_scrap_mosi.wrdata(c_ram_scrap.dat_w-1 DOWNTO 0),
rd_en => ram_scrap_mosi.rd,
rd_adr => ram_scrap_mosi.address(c_ram_scrap.adr_w-1 DOWNTO 0),
rd_dat => ram_scrap_miso.rddata(c_ram_scrap.dat_w-1 DOWNTO 0),
rd_val => ram_scrap_miso.rdval
);
END str;
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