Made tb self stopping, but not yet self checking.

libraries/base/common/tb/vhdl/tb_round.vhd

@@ -62,6 +62,7 @@ ARCHITECTURE tb OF tb_round IS
   SIGNAL out_udat         : STD_LOGIC_VECTOR(c_out_dat_w-1 DOWNTO 0);
   SIGNAL out_tdat         : STD_LOGIC_VECTOR(c_out_dat_w-1 DOWNTO 0);  -- truncate
   
+  SIGNAL tb_end           : STD_LOGIC := '0';
   SIGNAL clk              : STD_LOGIC := '1';
   SIGNAL rst              : STD_LOGIC := '1';
 
@@ -70,9 +71,26 @@ ARCHITECTURE tb OF tb_round IS
 BEGIN
 
   -- Stimuli
-  clk <= NOT(clk) AFTER clk_period/2;
+  clk <= NOT clk OR tb_end AFTER clk_period/2;
   rst <= '1', '0' AFTER 3*clk_period;
   
+  -- Testbench end
+  p_tb_end : PROCESS
+    VARIABLE v_dat : STD_LOGIC_VECTOR(in_dat'RANGE);
+  BEGIN
+    tb_end <= '0';
+    WAIT UNTIL in_val='1';
+    WAIT UNTIL rising_edge(clk);
+    v_dat := in_dat;              -- keep first in_dat 
+    WAIT UNTIL rising_edge(clk);
+    WAIT UNTIL v_dat=in_dat;      -- wait until all incrementing in_dat values have been applied at least once
+    WAIT UNTIL rising_edge(clk);
+    WAIT UNTIL rising_edge(clk);
+    WAIT UNTIL rising_edge(clk);
+    tb_end <= '1';
+    WAIT;
+  END PROCESS;
+  
   p_clk : PROCESS (rst, clk)
   BEGIN
     IF rst='1' THEN