added the g_technology field to system info (31 DOWNTO 27)

boards/uniboard1/libraries/unb1_board/src/vhdl/ctrl_unb1_board.vhd

@@ -441,7 +441,8 @@ BEGIN
     g_stamp_time        => g_stamp_time,
     g_stamp_svn         => g_stamp_svn,
     g_design_note       => g_design_note,
-    g_ctrl_unb1_version => c_ctrl_unb1_version
+    g_ctrl_unb1_version => c_ctrl_unb1_version,
+    g_technology        => g_technology
   )
   PORT MAP (
     mm_clk      => mm_clk,

boards/uniboard1/libraries/unb1_board/src/vhdl/mms_unb1_board_system_info.vhd

@@ -19,11 +19,12 @@
 --
 -------------------------------------------------------------------------------
 
-LIBRARY IEEE, common_lib;
+LIBRARY IEEE, common_lib, technology_lib;
 USE IEEE.STD_LOGIC_1164.ALL;
 USE common_lib.common_pkg.ALL;
 USE common_lib.common_mem_pkg.ALL;
 USE work.unb1_board_pkg.ALL;
+USE technology_lib.technology_pkg.ALL;
 
 ENTITY mms_unb1_board_system_info IS
   GENERIC (
@@ -36,7 +37,8 @@ ENTITY mms_unb1_board_system_info IS
     g_stamp_svn         : NATURAL := 0;
     g_design_note       : STRING  := "";
     g_aux               : t_c_unb1_board_aux := c_unb1_board_aux;               -- aux contains the hardware version
-    g_ctrl_unb1_version : NATURAL := 1
+    g_ctrl_unb1_version : NATURAL := 1;
+    g_technology        : NATURAL := c_tech_stratixiv
   );
   PORT (
     mm_rst          : IN    STD_LOGIC;
@@ -91,7 +93,8 @@ BEGIN
   GENERIC MAP (
     g_sim               => g_sim,
     g_fw_version        => g_fw_version,
-    g_ctrl_unb1_version => g_ctrl_unb1_version
+    g_ctrl_unb1_version => g_ctrl_unb1_version,
+    g_technology        => g_technology
   )            
   PORT MAP (        
     clk        => mm_clk, 

boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_system_info.vhd

@@ -20,10 +20,11 @@
 --
 --------------------------------------------------------------------------------
  
-LIBRARY IEEE, common_lib;
+LIBRARY IEEE, common_lib, technology_lib;
 USE IEEE.STD_LOGIC_1164.ALL;
 USE common_lib.common_pkg.ALL;
 USE work.unb1_board_pkg.ALL;
+USE technology_lib.technology_pkg.ALL;
 
 -- Keep the UniBoard system info knowledge in this HDL entity and in the
 -- corresponding software functions in unb_common.c,h. This avoids having to
@@ -34,7 +35,8 @@ ENTITY unb1_board_system_info IS
     g_sim               : BOOLEAN := FALSE;
     g_fw_version        : t_unb1_board_fw_version := c_unb1_board_fw_version;  -- firmware version x.y (4b.4b)
     g_aux               : t_c_unb1_board_aux := c_unb1_board_aux;              -- aux contains the hardware version
-    g_ctrl_unb1_version : NATURAL := 1
+    g_ctrl_unb1_version : NATURAL := 1;
+    g_technology        : NATURAL := c_tech_stratixiv
   );
   PORT (
     clk         : IN  STD_LOGIC;
@@ -86,8 +88,8 @@ BEGIN
 
   p_info : PROCESS(cs_sim, hw_version_reg, id_reg)
   BEGIN
-    nxt_info               <= (OTHERS=>'0');
-    nxt_info(27 DOWNTO 24) <= TO_UVEC(g_ctrl_unb1_version, 4);
+    nxt_info(31 DOWNTO 27) <= TO_UVEC(g_technology, 5);
+    nxt_info(26 DOWNTO 24) <= TO_UVEC(g_ctrl_unb1_version, 3);
     nxt_info(23 DOWNTO 20) <= TO_UVEC(g_fw_version.hi, 4);
     nxt_info(19 DOWNTO 16) <= TO_UVEC(g_fw_version.lo, 4);
     nxt_info(10)           <= cs_sim;

boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_system_info_reg.vhd

@@ -30,7 +30,7 @@
 --
 --  wi  Bits    R/W Name          Default  Description      |REG_UNB1_BOARD_SYSTEM_INFO|
 --  =============================================================================
---  0   [23..0] RO  info          
+--  0   [31..0] RO  info          
 --  1   [7..0]  RO  use_phy
 --  2   [31..0] RO  design_name
 --  .   ..      .   ..