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Commit 1b74c4dc authored by Reinier van der Walle's avatar Reinier van der Walle
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Merge branch 'L2SDP-305' into 'master' 

Resolve L2SDP-305

Closes L2SDP-305

See merge request desp/hdl!87
parents 85965a51 12302992
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2 merge requests!100Removed text for XSub that is now written in Confluence Subband correlator...,!87Resolve L2SDP-305
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with 52 additions and 54 deletions
applications/lofar2/designs/lofar2_unb2b_filterbank/lofar2_unb2b_filterbank.fpga.yaml
+ 4
− 4
View file @ 1b74c4dc
...@@ -105,14 +105,14 @@ peripherals: ...@@ -105,14 +105,14 @@ peripherals:
parameter_overrides: parameter_overrides:
- { name: g_nof_streams, value: 12 } # = S_pn - { name: g_nof_streams, value: 12 } # = S_pn
mm_port_names: mm_port_names:
- REG_DIAG_WG - REG_WG
- RAM_DIAG_WG - RAM_WG
- peripheral_name: aduh/aduh_mon_dc_power - peripheral_name: aduh/aduh_mon_dc_power
parameter_overrides: parameter_overrides:
- { name: g_nof_streams, value: 12 } # = S_pn - { name: g_nof_streams, value: 12 } # = S_pn
mm_port_names: mm_port_names:
- REG_ADUH_MON - REG_ADUH_MONITOR
# Commented RAM_ADUH_MON, because use RAM_DIAG_DATA_BUF_BSN instead # Commented RAM_ADUH_MON, because use RAM_DIAG_DATA_BUF_BSN instead
#- peripheral_name: aduh/aduh_mon_data_buffer #- peripheral_name: aduh/aduh_mon_data_buffer
...@@ -172,4 +172,4 @@ peripherals: ...@@ -172,4 +172,4 @@ peripherals:
- peripheral_name: sdp/sdp_statistics_offload_hdr_dat_sst - peripheral_name: sdp/sdp_statistics_offload_hdr_dat_sst
mm_port_names: mm_port_names:
- REG_STAT_HDR_INFO - REG_STAT_HDR_DAT
applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_cpu_0.ip
+ 7
− 7
View file @ 1b74c4dc
...@@ -1018,7 +1018,7 @@ ...@@ -1018,7 +1018,7 @@
<spirit:direction>out</spirit:direction> <spirit:direction>out</spirit:direction>
<spirit:vector> <spirit:vector>
<spirit:left>0</spirit:left> <spirit:left>0</spirit:left>
<spirit:right>18</spirit:right> <spirit:right>19</spirit:right>
</spirit:vector> </spirit:vector>
<spirit:wireTypeDefs> <spirit:wireTypeDefs>
<spirit:wireTypeDef> <spirit:wireTypeDef>
...@@ -2153,7 +2153,7 @@ ...@@ -2153,7 +2153,7 @@
<spirit:parameter> <spirit:parameter>
<spirit:name>dataAddrWidth</spirit:name> <spirit:name>dataAddrWidth</spirit:name>
<spirit:displayName>dataAddrWidth</spirit:displayName> <spirit:displayName>dataAddrWidth</spirit:displayName>
<spirit:value spirit:format="long" spirit:id="dataAddrWidth">19</spirit:value> <spirit:value spirit:format="long" spirit:id="dataAddrWidth">20</spirit:value>
</spirit:parameter> </spirit:parameter>
<spirit:parameter> <spirit:parameter>
<spirit:name>tightlyCoupledDataMaster0AddrWidth</spirit:name> <spirit:name>tightlyCoupledDataMaster0AddrWidth</spirit:name>
...@@ -2218,7 +2218,7 @@ ...@@ -2218,7 +2218,7 @@
<spirit:parameter> <spirit:parameter>
<spirit:name>dataSlaveMapParam</spirit:name> <spirit:name>dataSlaveMapParam</spirit:name>
<spirit:displayName>dataSlaveMapParam</spirit:displayName> <spirit:displayName>dataSlaveMapParam</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_stat_hdr_dat.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_wg.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3200' end='0x3300' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x3300' end='0x3340' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3340' end='0x3380' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3380' end='0x33A0' datawidth='32' /><slave name='reg_epcs.mem' start='0x33A0' end='0x33C0' datawidth='32' /><slave name='reg_remu.mem' start='0x33C0' end='0x33E0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x33E0' end='0x33F0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x33F0' end='0x3400' datawidth='32' /><slave name='reg_stat_enable.mem' start='0x3400' end='0x3408' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3408' end='0x3410' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x3410' end='0x3418' datawidth='32' /><slave name='reg_si.mem' start='0x3418' end='0x3420' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3420' end='0x3428' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3428' end='0x3430' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3430' end='0x3438' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3438' end='0x3440' datawidth='32' /><slave name='pio_pps.mem' start='0x3440' end='0x3448' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3448' end='0x3450' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_wg.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x40000' end='0x50000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x50000' end='0x60000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x70000' end='0x78000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0x78000' end='0x7A000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x7A000' end='0x7B000' datawidth='32' /></address-map>]]></spirit:value> <spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_stat_hdr_dat.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_wg.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3200' end='0x3300' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x3300' end='0x3340' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3340' end='0x3380' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3380' end='0x33A0' datawidth='32' /><slave name='reg_epcs.mem' start='0x33A0' end='0x33C0' datawidth='32' /><slave name='reg_remu.mem' start='0x33C0' end='0x33E0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x33E0' end='0x33F0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x33F0' end='0x3400' datawidth='32' /><slave name='reg_stat_enable.mem' start='0x3400' end='0x3408' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3408' end='0x3410' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x3410' end='0x3418' datawidth='32' /><slave name='reg_si.mem' start='0x3418' end='0x3420' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3420' end='0x3428' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3428' end='0x3430' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3430' end='0x3438' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3438' end='0x3440' datawidth='32' /><slave name='pio_pps.mem' start='0x3440' end='0x3448' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3448' end='0x3450' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x18000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_wg.mem' start='0x40000' end='0x50000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x50000' end='0x60000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x70000' end='0x80000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0x80000' end='0x82000' datawidth='32' /></address-map>]]></spirit:value>
</spirit:parameter> </spirit:parameter>
<spirit:parameter> <spirit:parameter>
<spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name> <spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name>
...@@ -2368,7 +2368,7 @@ ...@@ -2368,7 +2368,7 @@
</spirit:parameter> </spirit:parameter>
<spirit:parameter> <spirit:parameter>
<spirit:name>embeddedsw.CMacro.DATA_ADDR_WIDTH</spirit:name> <spirit:name>embeddedsw.CMacro.DATA_ADDR_WIDTH</spirit:name>
<spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DATA_ADDR_WIDTH">19</spirit:value> <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DATA_ADDR_WIDTH">20</spirit:value>
</spirit:parameter> </spirit:parameter>
<spirit:parameter> <spirit:parameter>
<spirit:name>embeddedsw.CMacro.DCACHE_LINE_SIZE</spirit:name> <spirit:name>embeddedsw.CMacro.DCACHE_LINE_SIZE</spirit:name>
...@@ -2668,7 +2668,7 @@ ...@@ -2668,7 +2668,7 @@
<name>d_address</name> <name>d_address</name>
<role>address</role> <role>address</role>
<direction>Output</direction> <direction>Output</direction>
<width>19</width> <width>20</width>
<lowerBound>0</lowerBound> <lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType> <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port> </port>
...@@ -3489,11 +3489,11 @@ ...@@ -3489,11 +3489,11 @@
<suppliedSystemInfos> <suppliedSystemInfos>
<entry> <entry>
<key>ADDRESS_MAP</key> <key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_wg.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='reg_aduh_monitor.mem' start='0x300' end='0x400' datawidth='32' /&gt;&lt;slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='pio_jesd_ctrl.mem' start='0x3008' end='0x3010' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x3100' end='0x3200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x3200' end='0x3300' datawidth='32' /&gt;&lt;slave name='reg_sdp_info.mem' start='0x3300' end='0x3340' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0x3340' end='0x3380' datawidth='32' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x3380' end='0x33A0' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x33A0' end='0x33C0' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x33C0' end='0x33E0' datawidth='32' /&gt;&lt;slave name='reg_bsn_source.mem' start='0x33E0' end='0x33F0' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buf_jesd.mem' start='0x33F0' end='0x3400' datawidth='32' /&gt;&lt;slave name='reg_stat_enable.mem' start='0x3400' end='0x3408' datawidth='32' /&gt;&lt;slave name='reg_dp_selector.mem' start='0x3408' end='0x3410' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler.mem' start='0x3410' end='0x3418' datawidth='32' /&gt;&lt;slave name='reg_si.mem' start='0x3418' end='0x3420' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x3420' end='0x3428' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x3428' end='0x3430' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3430' end='0x3438' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3438' end='0x3440' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3440' end='0x3448' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3448' end='0x3450' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /&gt;&lt;slave name='ram_wg.mem' start='0x10000' end='0x20000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buf_bsn.mem' start='0x40000' end='0x50000' datawidth='32' /&gt;&lt;slave name='ram_fil_coefs.mem' start='0x50000' end='0x60000' datawidth='32' /&gt;&lt;slave name='ram_st_sst.mem' start='0x60000' end='0x70000' datawidth='32' /&gt;&lt;slave name='ram_aduh_monitor.mem' start='0x70000' end='0x78000' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buf_jesd.mem' start='0x78000' end='0x7A000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x7A000' end='0x7B000' datawidth='32' /&gt;&lt;/address-map&gt;</value> <value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_wg.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='reg_aduh_monitor.mem' start='0x300' end='0x400' datawidth='32' /&gt;&lt;slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='pio_jesd_ctrl.mem' start='0x3008' end='0x3010' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x3100' end='0x3200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x3200' end='0x3300' datawidth='32' /&gt;&lt;slave name='reg_sdp_info.mem' start='0x3300' end='0x3340' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0x3340' end='0x3380' datawidth='32' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x3380' end='0x33A0' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x33A0' end='0x33C0' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x33C0' end='0x33E0' datawidth='32' /&gt;&lt;slave name='reg_bsn_source.mem' start='0x33E0' end='0x33F0' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buf_jesd.mem' start='0x33F0' end='0x3400' datawidth='32' /&gt;&lt;slave name='reg_stat_enable.mem' start='0x3400' end='0x3408' datawidth='32' /&gt;&lt;slave name='reg_dp_selector.mem' start='0x3408' end='0x3410' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler.mem' start='0x3410' end='0x3418' datawidth='32' /&gt;&lt;slave name='reg_si.mem' start='0x3418' end='0x3420' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x3420' end='0x3428' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x3428' end='0x3430' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3430' end='0x3438' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3438' end='0x3440' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3440' end='0x3448' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3448' end='0x3450' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /&gt;&lt;slave name='ram_aduh_monitor.mem' start='0x18000' end='0x20000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;slave name='ram_wg.mem' start='0x40000' end='0x50000' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buf_bsn.mem' start='0x50000' end='0x60000' datawidth='32' /&gt;&lt;slave name='ram_fil_coefs.mem' start='0x60000' end='0x70000' datawidth='32' /&gt;&lt;slave name='ram_st_sst.mem' start='0x70000' end='0x80000' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buf_jesd.mem' start='0x80000' end='0x82000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry> </entry>
<entry> <entry>
<key>ADDRESS_WIDTH</key> <key>ADDRESS_WIDTH</key>
<value>19</value> <value>20</value>
</entry> </entry>
</suppliedSystemInfos> </suppliedSystemInfos>
<consumedSystemInfos/> <consumedSystemInfos/>
......
applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_rom_system_info.ip
+ 9
− 9
View file @ 1b74c4dc
...@@ -129,7 +129,7 @@ ...@@ -129,7 +129,7 @@
<spirit:parameter> <spirit:parameter>
<spirit:name>addressSpan</spirit:name> <spirit:name>addressSpan</spirit:name>
<spirit:displayName>Address span</spirit:displayName> <spirit:displayName>Address span</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="addressSpan">4096</spirit:value> <spirit:value spirit:format="string" spirit:id="addressSpan">32768</spirit:value>
</spirit:parameter> </spirit:parameter>
<spirit:parameter> <spirit:parameter>
<spirit:name>addressUnits</spirit:name> <spirit:name>addressUnits</spirit:name>
...@@ -607,7 +607,7 @@ ...@@ -607,7 +607,7 @@
<spirit:direction>in</spirit:direction> <spirit:direction>in</spirit:direction>
<spirit:vector> <spirit:vector>
<spirit:left>0</spirit:left> <spirit:left>0</spirit:left>
<spirit:right>9</spirit:right> <spirit:right>12</spirit:right>
</spirit:vector> </spirit:vector>
<spirit:wireTypeDefs> <spirit:wireTypeDefs>
<spirit:wireTypeDef> <spirit:wireTypeDef>
...@@ -703,7 +703,7 @@ ...@@ -703,7 +703,7 @@
<spirit:direction>out</spirit:direction> <spirit:direction>out</spirit:direction>
<spirit:vector> <spirit:vector>
<spirit:left>0</spirit:left> <spirit:left>0</spirit:left>
<spirit:right>9</spirit:right> <spirit:right>12</spirit:right>
</spirit:vector> </spirit:vector>
<spirit:wireTypeDefs> <spirit:wireTypeDefs>
<spirit:wireTypeDef> <spirit:wireTypeDef>
...@@ -783,7 +783,7 @@ ...@@ -783,7 +783,7 @@
<spirit:parameter> <spirit:parameter>
<spirit:name>g_adr_w</spirit:name> <spirit:name>g_adr_w</spirit:name>
<spirit:displayName>g_adr_w</spirit:displayName> <spirit:displayName>g_adr_w</spirit:displayName>
<spirit:value spirit:format="long" spirit:id="g_adr_w">10</spirit:value> <spirit:value spirit:format="long" spirit:id="g_adr_w">13</spirit:value>
</spirit:parameter> </spirit:parameter>
<spirit:parameter> <spirit:parameter>
<spirit:name>g_dat_w</spirit:name> <spirit:name>g_dat_w</spirit:name>
...@@ -854,7 +854,7 @@ ...@@ -854,7 +854,7 @@
<name>coe_address_export</name> <name>coe_address_export</name>
<role>export</role> <role>export</role>
<direction>Output</direction> <direction>Output</direction>
<width>10</width> <width>13</width>
<lowerBound>0</lowerBound> <lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType> <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port> </port>
...@@ -918,7 +918,7 @@ ...@@ -918,7 +918,7 @@
<name>avs_mem_address</name> <name>avs_mem_address</name>
<role>address</role> <role>address</role>
<direction>Input</direction> <direction>Input</direction>
<width>10</width> <width>13</width>
<lowerBound>0</lowerBound> <lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType> <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port> </port>
...@@ -987,7 +987,7 @@ ...@@ -987,7 +987,7 @@
</entry> </entry>
<entry> <entry>
<key>addressSpan</key> <key>addressSpan</key>
<value>4096</value> <value>32768</value>
</entry> </entry>
<entry> <entry>
<key>addressUnits</key> <key>addressUnits</key>
...@@ -1382,11 +1382,11 @@ ...@@ -1382,11 +1382,11 @@
<consumedSystemInfos> <consumedSystemInfos>
<entry> <entry>
<key>ADDRESS_MAP</key> <key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value> <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry> </entry>
<entry> <entry>
<key>ADDRESS_WIDTH</key> <key>ADDRESS_WIDTH</key>
<value>12</value> <value>15</value>
</entry> </entry>
<entry> <entry>
<key>MAX_SLAVE_DATA_WIDTH</key> <key>MAX_SLAVE_DATA_WIDTH</key>
......
applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/qsys_lofar2_unb2b_filterbank.qsys
+ 28
− 28
View file @ 1b74c4dc
...@@ -22,7 +22,7 @@ ...@@ -22,7 +22,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "499712"; value = "8192";
type = "String"; type = "String";
} }
} }
...@@ -38,7 +38,7 @@ ...@@ -38,7 +38,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "8192"; value = "4096";
type = "String"; type = "String";
} }
} }
...@@ -223,7 +223,7 @@ ...@@ -223,7 +223,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "458752"; value = "98304";
type = "String"; type = "String";
} }
} }
...@@ -239,7 +239,7 @@ ...@@ -239,7 +239,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "262144"; value = "327680";
type = "String"; type = "String";
} }
} }
...@@ -255,7 +255,7 @@ ...@@ -255,7 +255,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "491520"; value = "524288";
type = "String"; type = "String";
} }
} }
...@@ -287,7 +287,7 @@ ...@@ -287,7 +287,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "327680"; value = "393216";
type = "String"; type = "String";
} }
} }
...@@ -319,7 +319,7 @@ ...@@ -319,7 +319,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "393216"; value = "458752";
type = "String"; type = "String";
} }
} }
...@@ -335,7 +335,7 @@ ...@@ -335,7 +335,7 @@
{ {
datum baseAddress datum baseAddress
{ {
value = "65536"; value = "262144";
type = "String"; type = "String";
} }
} }
...@@ -802,7 +802,7 @@ ...@@ -802,7 +802,7 @@
} }
datum sopceditor_expanded datum sopceditor_expanded
{ {
value = "0"; value = "1";
type = "boolean"; type = "boolean";
} }
} }
...@@ -815,7 +815,7 @@ ...@@ -815,7 +815,7 @@
} }
datum baseAddress datum baseAddress
{ {
value = "4096"; value = "65536";
type = "String"; type = "String";
} }
} }
...@@ -4083,7 +4083,7 @@ ...@@ -4083,7 +4083,7 @@
<name>d_address</name> <name>d_address</name>
<role>address</role> <role>address</role>
<direction>Output</direction> <direction>Output</direction>
<width>19</width> <width>20</width>
<lowerBound>0</lowerBound> <lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType> <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port> </port>
...@@ -5172,11 +5172,11 @@ ...@@ -5172,11 +5172,11 @@
<consumedSystemInfos> <consumedSystemInfos>
<entry> <entry>
<key>ADDRESS_MAP</key> <key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_wg.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='reg_aduh_monitor.mem' start='0x300' end='0x400' datawidth='32' /&gt;&lt;slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='pio_jesd_ctrl.mem' start='0x3008' end='0x3010' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x3100' end='0x3200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x3200' end='0x3300' datawidth='32' /&gt;&lt;slave name='reg_sdp_info.mem' start='0x3300' end='0x3340' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0x3340' end='0x3380' datawidth='32' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x3380' end='0x33A0' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x33A0' end='0x33C0' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x33C0' end='0x33E0' datawidth='32' /&gt;&lt;slave name='reg_bsn_source.mem' start='0x33E0' end='0x33F0' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buf_jesd.mem' start='0x33F0' end='0x3400' datawidth='32' /&gt;&lt;slave name='reg_stat_enable.mem' start='0x3400' end='0x3408' datawidth='32' /&gt;&lt;slave name='reg_dp_selector.mem' start='0x3408' end='0x3410' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler.mem' start='0x3410' end='0x3418' datawidth='32' /&gt;&lt;slave name='reg_si.mem' start='0x3418' end='0x3420' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x3420' end='0x3428' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x3428' end='0x3430' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3430' end='0x3438' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3438' end='0x3440' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3440' end='0x3448' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3448' end='0x3450' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /&gt;&lt;slave name='ram_wg.mem' start='0x10000' end='0x20000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buf_bsn.mem' start='0x40000' end='0x50000' datawidth='32' /&gt;&lt;slave name='ram_fil_coefs.mem' start='0x50000' end='0x60000' datawidth='32' /&gt;&lt;slave name='ram_st_sst.mem' start='0x60000' end='0x70000' datawidth='32' /&gt;&lt;slave name='ram_aduh_monitor.mem' start='0x70000' end='0x78000' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buf_jesd.mem' start='0x78000' end='0x7A000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x7A000' end='0x7B000' datawidth='32' /&gt;&lt;/address-map&gt;</value> <value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_wg.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='reg_aduh_monitor.mem' start='0x300' end='0x400' datawidth='32' /&gt;&lt;slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='pio_jesd_ctrl.mem' start='0x3008' end='0x3010' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x3100' end='0x3200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x3200' end='0x3300' datawidth='32' /&gt;&lt;slave name='reg_sdp_info.mem' start='0x3300' end='0x3340' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0x3340' end='0x3380' datawidth='32' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x3380' end='0x33A0' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x33A0' end='0x33C0' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x33C0' end='0x33E0' datawidth='32' /&gt;&lt;slave name='reg_bsn_source.mem' start='0x33E0' end='0x33F0' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buf_jesd.mem' start='0x33F0' end='0x3400' datawidth='32' /&gt;&lt;slave name='reg_stat_enable.mem' start='0x3400' end='0x3408' datawidth='32' /&gt;&lt;slave name='reg_dp_selector.mem' start='0x3408' end='0x3410' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler.mem' start='0x3410' end='0x3418' datawidth='32' /&gt;&lt;slave name='reg_si.mem' start='0x3418' end='0x3420' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x3420' end='0x3428' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x3428' end='0x3430' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3430' end='0x3438' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3438' end='0x3440' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3440' end='0x3448' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3448' end='0x3450' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /&gt;&lt;slave name='ram_aduh_monitor.mem' start='0x18000' end='0x20000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;slave name='ram_wg.mem' start='0x40000' end='0x50000' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buf_bsn.mem' start='0x50000' end='0x60000' datawidth='32' /&gt;&lt;slave name='ram_fil_coefs.mem' start='0x60000' end='0x70000' datawidth='32' /&gt;&lt;slave name='ram_st_sst.mem' start='0x70000' end='0x80000' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buf_jesd.mem' start='0x80000' end='0x82000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry> </entry>
<entry> <entry>
<key>ADDRESS_WIDTH</key> <key>ADDRESS_WIDTH</key>
<value>19</value> <value>20</value>
</entry> </entry>
</consumedSystemInfos> </consumedSystemInfos>
</value> </value>
...@@ -5296,7 +5296,7 @@ ...@@ -5296,7 +5296,7 @@
</entry> </entry>
<entry> <entry>
<key>embeddedsw.CMacro.DATA_ADDR_WIDTH</key> <key>embeddedsw.CMacro.DATA_ADDR_WIDTH</key>
<value>19</value> <value>20</value>
</entry> </entry>
<entry> <entry>
<key>embeddedsw.CMacro.DCACHE_LINE_SIZE</key> <key>embeddedsw.CMacro.DCACHE_LINE_SIZE</key>
...@@ -29387,7 +29387,7 @@ ...@@ -29387,7 +29387,7 @@
<name>coe_address_export</name> <name>coe_address_export</name>
<role>export</role> <role>export</role>
<direction>Output</direction> <direction>Output</direction>
<width>10</width> <width>13</width>
<lowerBound>0</lowerBound> <lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType> <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port> </port>
...@@ -29451,7 +29451,7 @@ ...@@ -29451,7 +29451,7 @@
<name>avs_mem_address</name> <name>avs_mem_address</name>
<role>address</role> <role>address</role>
<direction>Input</direction> <direction>Input</direction>
<width>10</width> <width>13</width>
<lowerBound>0</lowerBound> <lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType> <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port> </port>
...@@ -29520,7 +29520,7 @@ ...@@ -29520,7 +29520,7 @@
</entry> </entry>
<entry> <entry>
<key>addressSpan</key> <key>addressSpan</key>
<value>4096</value> <value>32768</value>
</entry> </entry>
<entry> <entry>
<key>addressUnits</key> <key>addressUnits</key>
...@@ -29926,11 +29926,11 @@ ...@@ -29926,11 +29926,11 @@
<suppliedSystemInfos> <suppliedSystemInfos>
<entry> <entry>
<key>ADDRESS_MAP</key> <key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value> <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry> </entry>
<entry> <entry>
<key>ADDRESS_WIDTH</key> <key>ADDRESS_WIDTH</key>
<value>12</value> <value>15</value>
</entry> </entry>
<entry> <entry>
<key>MAX_SLAVE_DATA_WIDTH</key> <key>MAX_SLAVE_DATA_WIDTH</key>
...@@ -30736,7 +30736,7 @@ ...@@ -30736,7 +30736,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="rom_system_info.mem"> end="rom_system_info.mem">
<parameter name="baseAddress" value="0x1000" /> <parameter name="baseAddress" value="0x00010000" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
...@@ -30827,7 +30827,7 @@ ...@@ -30827,7 +30827,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="ram_st_sst.mem"> end="ram_st_sst.mem">
<parameter name="baseAddress" value="0x00060000" /> <parameter name="baseAddress" value="0x00070000" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
...@@ -30841,7 +30841,7 @@ ...@@ -30841,7 +30841,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="ram_fil_coefs.mem"> end="ram_fil_coefs.mem">
<parameter name="baseAddress" value="0x00050000" /> <parameter name="baseAddress" value="0x00060000" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
...@@ -30855,7 +30855,7 @@ ...@@ -30855,7 +30855,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="ram_diag_data_buf_jesd.mem"> end="ram_diag_data_buf_jesd.mem">
<parameter name="baseAddress" value="0x00078000" /> <parameter name="baseAddress" value="0x00080000" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
...@@ -30869,7 +30869,7 @@ ...@@ -30869,7 +30869,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="ram_aduh_monitor.mem"> end="ram_aduh_monitor.mem">
<parameter name="baseAddress" value="0x00070000" /> <parameter name="baseAddress" value="0x00018000" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
...@@ -30883,7 +30883,7 @@ ...@@ -30883,7 +30883,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="ram_diag_data_buf_bsn.mem"> end="ram_diag_data_buf_bsn.mem">
<parameter name="baseAddress" value="0x00040000" /> <parameter name="baseAddress" value="0x00050000" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
...@@ -30897,7 +30897,7 @@ ...@@ -30897,7 +30897,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="ram_wg.mem"> end="ram_wg.mem">
<parameter name="baseAddress" value="0x00010000" /> <parameter name="baseAddress" value="0x00040000" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
...@@ -30988,7 +30988,7 @@ ...@@ -30988,7 +30988,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="avs_eth_0.mms_ram"> end="avs_eth_0.mms_ram">
<parameter name="baseAddress" value="0x0007a000" /> <parameter name="baseAddress" value="0x2000" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
...@@ -31002,7 +31002,7 @@ ...@@ -31002,7 +31002,7 @@
version="18.0" version="18.0"
start="cpu_0.data_master" start="cpu_0.data_master"
end="avs_eth_0.mms_tse"> end="avs_eth_0.mms_tse">
<parameter name="baseAddress" value="0x2000" /> <parameter name="baseAddress" value="0x1000" />
</connection> </connection>
<connection <connection
kind="avalon" kind="avalon"
applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd
+ 1
− 1
View file @ 1b74c4dc
...@@ -109,7 +109,7 @@ ARCHITECTURE str OF lofar2_unb2b_filterbank IS ...@@ -109,7 +109,7 @@ ARCHITECTURE str OF lofar2_unb2b_filterbank IS
CONSTANT c_dp_clk_freq : NATURAL := c_revision_select.dp_clk_freq; CONSTANT c_dp_clk_freq : NATURAL := c_revision_select.dp_clk_freq;
-- Firmware version x.y -- Firmware version x.y
CONSTANT c_fw_version : t_unb2b_board_fw_version := (1, 1); CONSTANT c_fw_version : t_unb2b_board_fw_version := (2, 0);
CONSTANT c_mm_clk_freq : NATURAL := c_unb2b_board_mm_clk_freq_100M; CONSTANT c_mm_clk_freq : NATURAL := c_unb2b_board_mm_clk_freq_100M;
CONSTANT c_lofar2_sample_clk_freq : NATURAL := 200 * 10**6; -- alternate 160MHz. TODO: Use to check PPS CONSTANT c_lofar2_sample_clk_freq : NATURAL := 200 * 10**6; -- alternate 160MHz. TODO: Use to check PPS
......
applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/mmm_lofar2_unb2b_filterbank.vhd
+ 2
− 4
View file @ 1b74c4dc
...@@ -286,7 +286,7 @@ BEGIN ...@@ -286,7 +286,7 @@ BEGIN
u_mm_file_reg_stat_enable : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_ENABLE") u_mm_file_reg_stat_enable : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_ENABLE")
PORT MAP(mm_rst, mm_clk, reg_stat_enable_mosi, reg_stat_enable_miso ); PORT MAP(mm_rst, mm_clk, reg_stat_enable_mosi, reg_stat_enable_miso );
u_mm_file_reg_stat_hdr_info : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_HDR_INFO") u_mm_file_reg_stat_hdr_info : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_HDR_DAT")
PORT MAP(mm_rst, mm_clk, reg_stat_hdr_dat_mosi, reg_stat_hdr_dat_miso); PORT MAP(mm_rst, mm_clk, reg_stat_hdr_dat_mosi, reg_stat_hdr_dat_miso);
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
...@@ -365,9 +365,7 @@ BEGIN ...@@ -365,9 +365,7 @@ BEGIN
rom_system_info_reset_export => OPEN, rom_system_info_reset_export => OPEN,
rom_system_info_clk_export => OPEN, rom_system_info_clk_export => OPEN,
-- ToDo: This has changed in the peripherals package rom_system_info_address_export => rom_unb_system_info_mosi.address(c_unb2b_board_peripherals_mm_reg_default.rom_unb_system_info_adr_w-1 DOWNTO 0),
rom_system_info_address_export => rom_unb_system_info_mosi.address(9 DOWNTO 0),
-- rom_system_info_address_export => rom_unb_system_info_mosi.address(c_unb2b_board_peripherals_mm_reg_default.rom_unb_system_info_adr_w-1 DOWNTO 0),
rom_system_info_write_export => rom_unb_system_info_mosi.wr, rom_system_info_write_export => rom_unb_system_info_mosi.wr,
rom_system_info_writedata_export => rom_unb_system_info_mosi.wrdata(c_word_w-1 DOWNTO 0), rom_system_info_writedata_export => rom_unb_system_info_mosi.wrdata(c_word_w-1 DOWNTO 0),
rom_system_info_read_export => rom_unb_system_info_mosi.rd, rom_system_info_read_export => rom_unb_system_info_mosi.rd,
......
applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd
+ 1
− 1
View file @ 1b74c4dc
...@@ -298,7 +298,7 @@ PACKAGE qsys_lofar2_unb2b_filterbank_pkg IS ...@@ -298,7 +298,7 @@ PACKAGE qsys_lofar2_unb2b_filterbank_pkg IS
reg_wg_write_export : out std_logic; -- export reg_wg_write_export : out std_logic; -- export
reg_wg_writedata_export : out std_logic_vector(31 downto 0); -- export reg_wg_writedata_export : out std_logic_vector(31 downto 0); -- export
reset_reset_n : in std_logic := 'X'; -- reset_n reset_reset_n : in std_logic := 'X'; -- reset_n
rom_system_info_address_export : out std_logic_vector(9 downto 0); -- export rom_system_info_address_export : out std_logic_vector(12 downto 0); -- export
rom_system_info_clk_export : out std_logic; -- export rom_system_info_clk_export : out std_logic; -- export
rom_system_info_read_export : out std_logic; -- export rom_system_info_read_export : out std_logic; -- export
rom_system_info_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export rom_system_info_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
......
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