Added files for mixed radix fft in configuration file

libraries/dig_receiver/fft_module_n/hdllib.cfg

@@ -40,6 +40,16 @@ synth_files =
     $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/reorder_radix_n.vhd
     $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/bitrev_mod4.vhd
     $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/winograd5_serial.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/bank1_load.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/bank2_load.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/double_port_mem.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/sop_to_phase.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/twiddle_lut.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/twiddle_main.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/fft5s_input_reorder.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/fft5s_output_reorder.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/fft5s_stage.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/fft_400.vhd
     
 test_bench_files = 
     $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/sims/dds_4.vhd
@@ -47,4 +57,5 @@ test_bench_files =
     $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/sims/tb_fftmod4_dav.vhd
     $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/sims/tb_real_fft.vhd
     $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/sims/tb_winograd5.vhd
+    $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/fft/src/vhdl/sims/tb_fft400.vhd