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Commit 18e4f403 authored by Reinier van der Walle's avatar Reinier van der Walle
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updated sdc file

parent ec65ade5
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1 merge request!114Resolve L2SDP-296
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applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station.sdc
+ 4
− 4
View file @ 18e4f403
...@@ -98,7 +98,7 @@ set_clock_groups -asynchronous -group [get_clocks {*xcvr_native_a10_0|g_xcvr_nat ...@@ -98,7 +98,7 @@ set_clock_groups -asynchronous -group [get_clocks {*xcvr_native_a10_0|g_xcvr_nat
#-group [get_clocks {inst2|xcvr_pll_inst|xcvr_fpll_a10_0|tx_bonding_clocks[0]}] #-group [get_clocks {inst2|xcvr_pll_inst|xcvr_fpll_a10_0|tx_bonding_clocks[0]}]
# false paths added for the jesd test design # false paths added for the jesd test design
set_false_path -from [get_clocks {*xcvr_fpll_a10_0|outclk2}] -to [get_clocks {*core_pll|link_clk}] set_false_path -from [get_clocks {*xcvr_fpll_a10_0|outclk2}] -to [get_clocks {*iopll_0|link_clk}]
set_false_path -from [get_clocks {*core_pll|link_clk}] -to [get_clocks {*xcvr_fpll_a10_0|outclk2}] set_false_path -from [get_clocks {*iopll_0|link_clk}] -to [get_clocks {*xcvr_fpll_a10_0|outclk2}]
set_false_path -from [get_clocks {*xcvr_fpll_a10_0|outclk2}] -to [get_clocks {*core_pll|frame_clk}] set_false_path -from [get_clocks {*xcvr_fpll_a10_0|outclk2}] -to [get_clocks {*iopll_0|frame_clk}]
set_false_path -from [get_clocks {*core_pll|frame_clk}] -to [get_clocks {*xcvr_fpll_a10_0|outclk2}] set_false_path -from [get_clocks {*iopll_0|frame_clk}] -to [get_clocks {*xcvr_fpll_a10_0|outclk2}]
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