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Commit 18ddb675 authored by Pepping's avatar Pepping
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_removed node

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boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
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......@@ -11,7 +11,6 @@ synth_top_level_entity =
synth_files =
$HDL_BUILD_DIR/quartus/unb1_fn_terminal_db/sopc_unb1_fn_terminal_db.vhd
src/vhdl/mmm_unb1_fn_terminal_db.vhd
src/vhdl/node_unb1_fn_terminal_db.vhd
src/vhdl/unb1_fn_terminal_db.vhd
test_bench_files =
......
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