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RTSD
HDL
Commits
16941063
Commit
16941063
authored
4 years ago
by
Pieter Donker
Browse files
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Plain Diff
mak tb_tb_* also working with new tb_*
parent
29c7e7f9
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3 merge requests
!100
Removed text for XSub that is now written in Confluence Subband correlator...
,
!54
Resolve L2SDP-49
,
!49
WIP: Resolve L2SDP-49
Changes
2
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2 changed files
libraries/base/dp/tb/vhdl/tb_dp_bsn_source_v2.vhd
+22
-7
22 additions, 7 deletions
libraries/base/dp/tb/vhdl/tb_dp_bsn_source_v2.vhd
libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_source_v2.vhd
+10
-10
10 additions, 10 deletions
libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_source_v2.vhd
with
32 additions
and
17 deletions
libraries/base/dp/tb/vhdl/tb_dp_bsn_source_v2.vhd
+
22
−
7
View file @
16941063
...
@@ -114,13 +114,13 @@ BEGIN
...
@@ -114,13 +114,13 @@ BEGIN
BEGIN
BEGIN
WAIT
UNTIL
rising_edge
(
clk
);
WAIT
UNTIL
rising_edge
(
clk
);
expected_sync
<=
'0'
;
expected_sync
<=
'0'
;
proc_common_wait_until_
lo_
hi
(
clk
,
pps_sop
);
proc_common_wait_until_hi
gh
(
clk
,
pps_sop
);
IF
bsn_sop
=
'1'
THEN
IF
bsn_sop
=
'1'
THEN
expected_sync
<=
'1'
;
expected_sync
<=
'1'
;
expected_bsn
<=
BSN
+
1
;
expected_bsn
<=
BSN
+
1
;
expected_offset_bsn
<=
0
;
expected_offset_bsn
<=
0
;
ELSE
ELSE
proc_common_wait_until_
lo_
hi
(
clk
,
bsn_sop
);
proc_common_wait_until_hi
gh
(
clk
,
bsn_sop
);
expected_sync
<=
'1'
;
expected_sync
<=
'1'
;
expected_bsn
<=
BSN
+
1
;
expected_bsn
<=
BSN
+
1
;
expected_offset_bsn
<=
(
BSN
+
1
)
*
g_block_size
-
SSN
*
g_pps_interval
;
expected_offset_bsn
<=
(
BSN
+
1
)
*
g_block_size
-
SSN
*
g_pps_interval
;
...
@@ -146,7 +146,7 @@ BEGIN
...
@@ -146,7 +146,7 @@ BEGIN
proc_common_wait_some_cycles
(
clk
,
500
);
proc_common_wait_some_cycles
(
clk
,
500
);
-- Start asynchronously by making dp_on high
-- Start asynchronously by making dp_on high
proc_common_wait_until_hi
_lo
(
clk
,
expected_sync
);
proc_common_wait_until_hi
gh
(
clk
,
expected_sync
_dly
);
tb_state
<=
s_pps_start
;
tb_state
<=
s_pps_start
;
dp_on_pps
<=
'0'
;
dp_on_pps
<=
'0'
;
dp_on
<=
'1'
;
dp_on
<=
'1'
;
...
@@ -157,12 +157,19 @@ BEGIN
...
@@ -157,12 +157,19 @@ BEGIN
tb_state
<=
s_disable
;
tb_state
<=
s_disable
;
dp_on
<=
'0'
;
dp_on
<=
'0'
;
dp_on_pps
<=
'0'
;
dp_on_pps
<=
'0'
;
proc_common_wait_some_cycles
(
clk
,
3
*
g_pps_interval
);
-- wait until one pps_interval before next begin of SSN generator (pps_sop = bsn_sop)
proc_common_wait_until_high
(
clk
,
pps_sop
);
v_bsn_time_offset
:
=
((
SSN
+
2
)
*
g_pps_interval
)
MOD
g_block_size
;
WHILE
v_bsn_time_offset
>
0
LOOP
proc_common_wait_some_cycles
(
clk
,
g_pps_interval
);
v_bsn_time_offset
:
=
((
SSN
+
2
)
*
g_pps_interval
)
MOD
g_block_size
;
END
LOOP
;
-- Start synchronously by making dp_on high at pps
-- Start synchronously by making dp_on high at pps
FOR
i
IN
0
TO
2
LOOP
FOR
i
IN
0
TO
2
LOOP
-- Now start on PPS
-- Now start on PPS
proc_common_wait_until_hi
_lo
(
clk
,
expected_sync
);
proc_common_wait_until_hi
gh
(
clk
,
expected_sync
);
v_bsn_time_offset
:
=
((
SSN
+
1
)
*
g_pps_interval
)
MOD
g_block_size
;
v_bsn_time_offset
:
=
((
SSN
+
1
)
*
g_pps_interval
)
MOD
g_block_size
;
v_bsn_init
:
=
((
SSN
+
1
)
*
g_pps_interval
)
/
g_block_size
;
v_bsn_init
:
=
((
SSN
+
1
)
*
g_pps_interval
)
/
g_block_size
;
IF
v_bsn_time_offset
=
0
THEN
IF
v_bsn_time_offset
=
0
THEN
...
@@ -180,7 +187,15 @@ BEGIN
...
@@ -180,7 +187,15 @@ BEGIN
tb_state
<=
s_disable
;
tb_state
<=
s_disable
;
dp_on
<=
'0'
;
dp_on
<=
'0'
;
dp_on_pps
<=
'0'
;
dp_on_pps
<=
'0'
;
proc_common_wait_some_cycles
(
clk
,
3
*
g_pps_interval
);
-- wait until one pps_interval before next begin of SSN generator (pps_sop = bsn_sop)
proc_common_wait_until_high
(
clk
,
pps_sop
);
v_bsn_time_offset
:
=
((
SSN
+
2
)
*
g_pps_interval
)
MOD
g_block_size
;
WHILE
v_bsn_time_offset
>
0
LOOP
proc_common_wait_some_cycles
(
clk
,
g_pps_interval
);
v_bsn_time_offset
:
=
((
SSN
+
2
)
*
g_pps_interval
)
MOD
g_block_size
;
END
LOOP
;
END
LOOP
;
END
LOOP
;
tb_end
<=
'1'
;
tb_end
<=
'1'
;
...
...
This diff is collapsed.
Click to expand it.
libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_source_v2.vhd
+
10
−
10
View file @
16941063
...
@@ -37,19 +37,19 @@ ARCHITECTURE tb OF tb_tb_dp_bsn_source_v2 IS
...
@@ -37,19 +37,19 @@ ARCHITECTURE tb OF tb_tb_dp_bsn_source_v2 IS
BEGIN
BEGIN
-- from tb_dp_bsn_source_v2.vhd
-- from tb_dp_bsn_source_v2.vhd
--
--
-- g_
sync_offset
: NATURAL :=
0
-- g_
pps_interval
: NATURAL :=
240
-- g_
clk_per_sync
: NATURAL :=
240
-- g_
block_size
: NATURAL :=
32
--
(sync_offset, clk_per_sync
)
--
(g_pps_interval, g_block_size
)
-- test different clk_per_sync
-- test different clk_per_sync
u0_230
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
0
,
2
30
);
u0_230
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
23
0
,
3
2
);
u0_240
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
0
,
2
40
);
u0_240
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
24
0
,
3
2
);
u0_248
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
0
,
248
);
u0_248
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
248
,
32
);
-- test different
sync_offset
s
-- test different
block_size'
s
u1_1
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
1
,
248
);
u1_1
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
240
,
30
);
u1_3
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
3
,
248
);
u1_3
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
240
,
32
);
u1_4
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
4
,
2
48
);
u1_4
:
ENTITY
work
.
tb_dp_bsn_source_v2
GENERIC
MAP
(
240
,
2
7
);
END
tb
;
END
tb
;
\ No newline at end of file
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