Corrected compile errors for unb1_board.

boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_uth_terminals_bidir.vhd

@@ -34,7 +34,7 @@ USE dp_lib.dp_packet_pkg.ALL;
 USE work.unb1_board_pkg.ALL;
 USE uth_lib.uth_pkg.ALL;
 
-ENTITY unb1_board_back_terminals IS
+ENTITY unb1_board_back_uth_terminals_bidir IS
   GENERIC (
     -- User
     g_usr_nof_streams     : NATURAL := 4;      -- number of user streams per bus
@@ -75,10 +75,10 @@ ENTITY unb1_board_back_terminals IS
     rx_uth_sosi_2arr      : IN  t_unb1_board_back_sosi_2arr;
     rx_uth_siso_2arr      : OUT t_unb1_board_back_siso_2arr 
   );
-END unb1_board_back_terminals;
+END unb1_board_back_uth_terminals_bidir;
 
 
-ARCHITECTURE str OF unb1_board_back_terminals IS
+ARCHITECTURE str OF unb1_board_back_uth_terminals_bidir IS
  
   CONSTANT c_tx_mux_mode  : NATURAL := 1;  -- can use 0 for non-blocking tx mux in dp_distribute or use 1 to preserve input order for tx
   CONSTANT c_rx_mux_mode  : NATURAL := 0;  -- must use 0 for non-blocking rx mux in dp_distribute (can not use 1 to preserve input order for rx, because some rx frames may go lost)

boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_control.vhd

@@ -25,7 +25,7 @@
 --   . unb1_board_control.vhd with e.g. 1GbE and PPS
 --   . node_<design_name>.vhd with the actual functionality of <design_name>
 
-LIBRARY IEEE, common_lib, dp_lib, ppsh_lib, i2c_lib, tse_lib, remu_lib;
+LIBRARY IEEE, common_lib, dp_lib, ppsh_lib, i2c_lib, tech_tse_lib, eth_lib, remu_lib;
 USE IEEE.STD_LOGIC_1164.ALL;
 USE IEEE.NUMERIC_STD.ALL;
 USE common_lib.common_pkg.ALL;
@@ -33,8 +33,8 @@ USE common_lib.common_mem_pkg.ALL;
 USE dp_lib.dp_stream_pkg.ALL;
 USE work.unb1_board_pkg.ALL;
 USE i2c_lib.i2c_pkg.ALL;
-USE tse_lib.tse_pkg.ALL;
-USE tse_lib.eth_pkg.ALL;
+USE tech_tse_lib.tech_tse_pkg.ALL;
+USE eth_lib.eth_pkg.ALL;
 
 ENTITY unb1_board_control IS
   GENERIC (
@@ -579,7 +579,7 @@ BEGIN
       eth1g_st_rst <= eth1g_mm_rst;
     END GENERATE;
 
-    u_mac : ENTITY tse_lib.eth
+    u_mac : ENTITY eth_lib.eth
     GENERIC MAP (
       g_cross_clock_domain => g_udp_offload
     )

boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_uth_terminals_bidir.vhd

@@ -22,8 +22,8 @@
 
 -- Purpose: Instantiate uthernet TX and/or RX terminals for UniBoard mesh
 -- Description:
--- Remark: This file is identical to unb1_board_back_terminals.vhd except for
---         the SOSI entity I/O types and the monitor outputs.
+-- Remark: This file is identical to unb1_board_back_uth_terminals_bidir.vhd
+--         except for the SOSI entity I/O types and the monitor outputs.
 
 LIBRARY IEEE, common_lib, dp_lib, uth_lib;
 USE IEEE.std_logic_1164.ALL;
@@ -34,7 +34,7 @@ USE dp_lib.dp_packet_pkg.ALL;
 USE work.unb1_board_pkg.ALL;
 USE uth_lib.uth_pkg.ALL;
 
-ENTITY unb1_board_mesh_terminals IS
+ENTITY unb1_board_mesh_uth_terminals_bidir IS
   GENERIC (
     -- User
     g_usr_nof_streams     : NATURAL := 4;      -- number of user streams per bus
@@ -82,10 +82,10 @@ ENTITY unb1_board_mesh_terminals IS
     rx_mon_pkt_sosi_2arr  : OUT t_unb1_board_mesh_sosi_2arr;
     rx_mon_dist_sosi_2arr : OUT t_unb1_board_mesh_sosi_2arr 
   );
-END unb1_board_mesh_terminals;
+END unb1_board_mesh_uth_terminals_bidir;
 
 
-ARCHITECTURE str OF unb1_board_mesh_terminals IS
+ARCHITECTURE str OF unb1_board_mesh_uth_terminals_bidir IS
 
   CONSTANT c_tx_mux_mode  : NATURAL := 0;  -- can use 0 for non-blocking tx mux in dp_distribute or use 1 to preserve input order for tx
   CONSTANT c_rx_mux_mode  : NATURAL := 0;  -- must use 0 for non-blocking rx mux in dp_distribute (can not use 1 to preserve input order for rx, because some rx frames may go lost)

boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_terminals_back.vhd

@@ -42,7 +42,6 @@ USE work.unb1_board_pkg.ALL;
 USE dp_lib.dp_stream_pkg.ALL;
 USE dp_lib.dp_packet_pkg.ALL;
 USE uth_lib.uth_pkg.ALL;
-USE tr_nonbonded_lib.tr_nonbonded_pkg.ALL;
 
 
 ENTITY unb1_board_terminals_back IS

boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_terminals_mesh.vhd

@@ -58,7 +58,6 @@ USE work.unb1_board_pkg.ALL;
 USE dp_lib.dp_stream_pkg.ALL;
 USE dp_lib.dp_packet_pkg.ALL;
 USE uth_lib.uth_pkg.ALL;
-USE tr_nonbonded_lib.tr_nonbonded_pkg.ALL;
 
 
 ENTITY unb1_board_terminals_mesh IS

boards/uniboard1/libraries/unb1_board/tb/vhdl/tb_unb1_board_pkg.vhd

@@ -55,5 +55,5 @@ PACKAGE tb_unb1_board_pkg IS
 END tb_unb1_board_pkg;
 
 
-PACKAGE BODY tb_unb1_board_common_pkg IS
+PACKAGE BODY tb_unb1_board_pkg IS
 END tb_unb1_board_pkg;