Use reg range constants from dp_components_pkg.vhd

libraries/base/dp/hdllib.cfg

@@ -6,6 +6,7 @@ hdl_lib_technology =
 
 synth_files =
     src/vhdl/dp_stream_pkg.vhd
+    src/vhdl/dp_components_pkg.vhd
     src/vhdl/dp_example_dut.vhd
     src/vhdl/dp_packetizing_pkg.vhd
     src/vhdl/dp_packet_pkg.vhd