corrected signal names

applications/arts/designs/arts_unb2b_sc4_fwd/src/vhdl/arts_unb2b_sc4_fwd.vhd

@@ -236,10 +236,10 @@ ARCHITECTURE str OF arts_unb2b_sc4_fwd IS
   SIGNAL unb2_board_front_io_serial_tx_arr : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS=>'0');
   SIGNAL unb2_board_front_io_serial_rx_arr : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0);
 
-  SIGNAL unb2_board_10gbe_snk_in_arr       : t_dp_sosi_arr(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
-  SIGNAL unb2_board_10gbe_snk_out_arr      : t_dp_siso_arr(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS => c_dp_siso_rst);
-  SIGNAL unb2_board_10gbe_src_out_arr      : t_dp_sosi_arr(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
-  SIGNAL unb2_board_10gbe_src_in_arr       : t_dp_siso_arr(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS => c_dp_siso_rst); 
+  SIGNAL tr_10GbE_snk_in_arr       : t_dp_sosi_arr(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
+  SIGNAL tr_10GbE_snk_out_arr      : t_dp_siso_arr(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS => c_dp_siso_rst);
+  SIGNAL tr_10GbE_src_out_arr      : t_dp_sosi_arr(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
+  SIGNAL tr_10GbE_src_in_arr       : t_dp_siso_arr(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS => c_dp_siso_rst); 
  
   SIGNAL reg_tr_10GbE_mac_mosi             : t_mem_mosi;
   SIGNAL reg_tr_10GbE_mac_miso             : t_mem_miso;
@@ -352,11 +352,11 @@ BEGIN
       dp_rst              => dp_rst,
       dp_clk              => dp_clk,
 
-      src_out_arr         => unb2_board_10gbe_src_out_arr,
-      src_in_arr          => unb2_board_10gbe_src_in_arr,
+      src_out_arr         => tr_10GbE_src_out_arr,
+      src_in_arr          => tr_10GbE_src_in_arr,
 
-      snk_out_arr         => unb2_board_10gbe_snk_out_arr,
-      snk_in_arr          => unb2_board_10gbe_snk_in_arr,
+      snk_out_arr         => tr_10GbE_snk_out_arr,
+      snk_in_arr          => tr_10GbE_snk_in_arr,
 
       -- Serial IO
       serial_tx_arr       => unb2_board_front_io_serial_tx_arr,
@@ -376,17 +376,17 @@ BEGIN
     --  QSFP 5, RX 1 (21)-> QSFP 1, TX 3 (7) 
     ------------------------------------------------------------
     gen_dp_fwd : FOR i IN 0 TO 7 GENERATE   
-    unb2_board_10gbe_snk_in_arr(i)   <= unb2_board_10gbe_src_out_arr(i*3);
-    unb2_board_10gbe_src_in_arr(i*3) <= unb2_board_10gbe_snk_out_arr(i);  
+    tr_10GbE_snk_in_arr(i)   <= tr_10GbE_src_out_arr(i*3);
+    tr_10GbE_src_in_arr(i*3) <= tr_10GbE_snk_out_arr(i);  
     END GENERATE;
 
     ------------------------------------------------------------
     -- connecting the used streams to the qsfp LEDs controller
     ------------------------------------------------------------
     gen_qsfp_leds_wires : FOR i IN 0 TO 7 GENERATE    
-      unb2_board_qsfp_leds_tx_src_in_arr(i)   <= unb2_board_10gbe_snk_out_arr(i);                                                   
-      unb2_board_qsfp_leds_tx_snk_in_arr(i)   <= unb2_board_10gbe_snk_in_arr(i);
-      unb2_board_qsfp_leds_rx_snk_in_arr(i*3) <= unb2_board_10gbe_src_out_arr(i*3);
+      unb2_board_qsfp_leds_tx_src_in_arr(i)   <= tr_10GbE_snk_out_arr(i);                                                   
+      unb2_board_qsfp_leds_tx_snk_in_arr(i)   <= tr_10GbE_snk_in_arr(i);
+      unb2_board_qsfp_leds_rx_snk_in_arr(i*3) <= tr_10GbE_src_out_arr(i*3);
     END GENERATE;   
 
     ------------------------