first index of t_common_field_arr should be on same line as CONSTANT

libraries/base/diag/src/vhdl/mms_diag_rx_seq.vhd

@@ -138,15 +138,14 @@ ARCHITECTURE str OF mms_diag_rx_seq IS
                                         init_sl  => '0');
   
   -- Define MM slave register fields for Python peripheral using pi_common.py (specify MM register access per word, not per individual bit because mm_fields assumes 1 field per MM word)
-  CONSTANT c_mm_reg_field_arr : t_common_field_arr(c_mm_reg.nof_dat-1 DOWNTO 0) :=
-                               ( ( field_name_pad("control"),   "RW",        2, field_default(0) ),   -- [0] = control[1:0] = diag_sel & diag_en
-                                 ( field_name_pad("result"),    "RO",        2, field_default(0) ),   -- [1] = result[1:0]  = res_val_n & res_ok_n
-                                 ( field_name_pad("rx_cnt"),    "RO", c_word_w, field_default(0) ),   -- [2]
-                                 ( field_name_pad("rx_sample"), "RO", c_word_w, field_default(0) ),   -- [3]
-                                 ( field_name_pad("step_0"),    "RW", c_word_w, field_default(0) ),   -- [4] = diag_steps_arr[0]
-                                 ( field_name_pad("step_1"),    "RW", c_word_w, field_default(0) ),   -- [5] = diag_steps_arr[1]
-                                 ( field_name_pad("step_2"),    "RW", c_word_w, field_default(0) ),   -- [6] = diag_steps_arr[2]
-                                 ( field_name_pad("step_3"),    "RW", c_word_w, field_default(0) ));  -- [7] = diag_steps_arr[3], c_diag_seq_rx_reg_nof_steps = 4
+  CONSTANT c_mm_reg_field_arr : t_common_field_arr(c_mm_reg.nof_dat-1 DOWNTO 0) := ( ( field_name_pad("control"),   "RW",        2, field_default(0) ),   -- [0] = control[1:0] = diag_sel & diag_en
+                                                                                     ( field_name_pad("result"),    "RO",        2, field_default(0) ),   -- [1] = result[1:0]  = res_val_n & res_ok_n
+                                                                                     ( field_name_pad("rx_cnt"),    "RO", c_word_w, field_default(0) ),   -- [2]
+                                                                                     ( field_name_pad("rx_sample"), "RO", c_word_w, field_default(0) ),   -- [3]
+                                                                                     ( field_name_pad("step_0"),    "RW", c_word_w, field_default(0) ),   -- [4] = diag_steps_arr[0]
+                                                                                     ( field_name_pad("step_1"),    "RW", c_word_w, field_default(0) ),   -- [5] = diag_steps_arr[1]
+                                                                                     ( field_name_pad("step_2"),    "RW", c_word_w, field_default(0) ),   -- [6] = diag_steps_arr[2]
+                                                                                     ( field_name_pad("step_3"),    "RW", c_word_w, field_default(0) ));  -- [7] = diag_steps_arr[3], c_diag_seq_rx_reg_nof_steps = 4
                                   
   CONSTANT c_reg_slv_w   : NATURAL := c_mm_reg.nof_dat*c_mm_reg.dat_w;
   

libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd

@@ -186,11 +186,10 @@ ARCHITECTURE str OF mms_diag_tx_seq IS
                                         init_sl  => '0');
 
   -- Define MM slave register fields for Python peripheral using pi_common.py (specify MM register access per word, not per individual bit because mm_fields assumes 1 field per MM word)
-  CONSTANT c_mm_reg_field_arr : t_common_field_arr(c_mm_reg.nof_dat-1 DOWNTO 0) :=
-                                ( ( field_name_pad("control"), "RW",        3, field_default(0) ),  -- control[2:0] = diag_dc & diag_sel & diag_en
-                                  ( field_name_pad("init"),    "RW", c_word_w, field_default(0) ),
-                                  ( field_name_pad("tx_cnt"),  "RO", c_word_w, field_default(0) ),
-                                  ( field_name_pad("modulo"),  "RW", c_word_w, field_default(0) ));
+  CONSTANT c_mm_reg_field_arr : t_common_field_arr(c_mm_reg.nof_dat-1 DOWNTO 0) := ( ( field_name_pad("control"), "RW",        3, field_default(0) ),  -- control[2:0] = diag_dc & diag_sel & diag_en
+                                                                                     ( field_name_pad("init"),    "RW", c_word_w, field_default(0) ),
+                                                                                     ( field_name_pad("tx_cnt"),  "RO", c_word_w, field_default(0) ),
+                                                                                     ( field_name_pad("modulo"),  "RW", c_word_w, field_default(0) ));
   
   CONSTANT c_reg_slv_w   : NATURAL := c_mm_reg.nof_dat*c_mm_reg.dat_w;