Use 50MHz mm_clk instead of 125MHz

applications/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3.vhd

@@ -191,7 +191,7 @@ ARCHITECTURE str OF arts_unb2b_sc3 IS
   -- ctrl_unb2_board
   -------------------------------------------------------------------------------
   CONSTANT c_fw_version                            : t_unb2_board_fw_version := (1, 1);
-  CONSTANT c_mm_clk_freq                           : NATURAL := c_unb2_board_mm_clk_freq_125M;
+  CONSTANT c_mm_clk_freq                           : NATURAL := c_unb2_board_mm_clk_freq_50M; --c_unb2_board_mm_clk_freq_125M;
   CONSTANT c_use_1GbE                              : BOOLEAN := FALSE;
   CONSTANT c_nof_streams_1GbE                      : NATURAL := sel_a_b(c_use_1GbE,1,0); --sel_a_b(c_use_1GbE,c_unb2_board_nof_eth,0);
   CONSTANT c_nof_streams_qsfp                      : NATURAL := 24;
@@ -573,7 +573,7 @@ BEGIN
     g_stamp_time              => g_stamp_time, 
     g_stamp_svn               => g_stamp_svn, 
     g_fw_version              => c_fw_version,
-    g_mm_clk_freq             => sel_a_b(g_sim,c_unb2_board_mm_clk_freq_25M,c_unb2_board_mm_clk_freq_125M),
+    g_mm_clk_freq             => sel_a_b(g_sim,c_unb2_board_mm_clk_freq_25M,c_mm_clk_freq),
     g_eth_clk_freq            => c_unb2_board_eth_clk_freq_125M,
     g_aux                     => c_unb2_board_aux,
     g_udp_offload             => c_use_1GbE,