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Commit 02548eb7 authored by Pieter Donker's avatar Pieter Donker
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L2SDP-207, backup

parent c1835607
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2 merge requests!100Removed text for XSub that is now written in Confluence Subband correlator...,!79Resolve L2SDP-207
......@@ -233,17 +233,18 @@ PACKAGE sdp_pkg is
CONSTANT c_sdp_bst_udp_src_port_15_8 : STD_LOGIC_VECTOR(7 DOWNTO 0) := x"D1"; -- TBC
CONSTANT c_sdp_xst_udp_src_port_15_8 : STD_LOGIC_VECTOR(7 DOWNTO 0) := x"D2"; -- TBC
CONSTANT c_sdp_stat_nof_hdr_fields : NATURAL := 3+12+4+20+1; -- 592b; 9.25 64b words
CONSTANT c_sdp_stat_hdr_field_sel : STD_LOGIC_VECTOR(c_sdp_stat_nof_hdr_fields-1 DOWNTO 0) := "101"&"111111111001"&"0111"&"01000000000000000000"&"0"; -- 0=data path, 1=MM controlled TODO
CONSTANT c_sdp_stat_nof_hdr_fields : NATURAL := 1+3+12+4+20+1; -- 592b; 18.5 32b words
CONSTANT c_sdp_stat_hdr_field_sel : STD_LOGIC_VECTOR(c_sdp_stat_nof_hdr_fields-1 DOWNTO 0) := "1"&"101"&"111111111101"&"0111"&"01000000000000000100"&"0"; -- 0=data path, 1=MM controlled TODO
CONSTANT c_sdp_stat_hdr_field_arr : t_common_field_arr(c_sdp_stat_nof_hdr_fields-1 DOWNTO 0) := (
( field_name_pad("word_align" ), "RW", 16, field_default(0) ),
( field_name_pad("eth_dst_mac" ), "RW", 48, field_default(x"001B217176B9") ), -- 001B217176B9 = DOP36-enp2s0
( field_name_pad("eth_src_mac" ), "RW", 48, field_default(0) ),
( field_name_pad("eth_type" ), "RW", 16, field_default(x"0800") ),
( field_name_pad("ip_version" ), "RW", 4, field_default(4) ),
( field_name_pad("ip_header_length" ), "RW", 4, field_default(5) ),
( field_name_pad("ip_services" ), "RW", 8, field_default(0) ),
( field_name_pad("ip_total_length" ), "RW", 16, field_default(7868) ),
( field_name_pad("ip_total_length" ), "RW", 16, field_default(4156) ),
( field_name_pad("ip_identification" ), "RW", 16, field_default(0) ),
( field_name_pad("ip_flags" ), "RW", 3, field_default(2) ),
( field_name_pad("ip_fragment_offset" ), "RW", 13, field_default(0) ),
......@@ -254,7 +255,7 @@ PACKAGE sdp_pkg is
( field_name_pad("ip_dst_addr" ), "RW", 32, field_default(x"0A6300FE") ), -- 0A6300FE = DOP36-enp2s0 '10.99.0.254'
( field_name_pad("udp_src_port" ), "RW", 16, field_default(0) ),
( field_name_pad("udp_dst_port" ), "RW", 16, field_default(5001) ),
( field_name_pad("udp_total_length" ), "RW", 16, field_default(7848) ),
( field_name_pad("udp_total_length" ), "RW", 16, field_default(4136) ),
( field_name_pad("udp_checksum" ), "RW", 16, field_default(0) ),
( field_name_pad("sdp_marker" ), "RW", 8, field_default(0) ),
( field_name_pad("sdp_version_id" ), "RW", 8, field_default(5) ),
......
......@@ -261,15 +261,17 @@ BEGIN
trigger_dly => trigger
);
u_dp_block_from_mm : ENTITY dp_lib.dp_block_from_mm
u_dp_block_from_mm : ENTITY dp_lib.dp_block_from_mm_dc
GENERIC MAP (
g_data_size => c_data_size,
g_step_size => c_step_size,
g_nof_data => c_nof_data
)
PORT MAP(
rst => dp_rst,
clk => dp_clk,
dp_rst => dp_rst,
dp_clk => dp_clk,
mm_rst => mm_rst,
mm_clk => mm_clk,
start_pulse => r.start_pulse,
start_address => r.start_address,
mm_done => mm_done,
......
......@@ -74,6 +74,7 @@ synth_files =
src/vhdl/dp_block_gen.vhd
src/vhdl/dp_block_gen_valid_arr.vhd
src/vhdl/dp_block_from_mm.vhd
src/vhdl/dp_block_from_mm_dc.vhd
src/vhdl/dp_block_to_mm.vhd
src/vhdl/dp_bsn_source.vhd
src/vhdl/dp_bsn_source_v2.vhd
......@@ -193,6 +194,7 @@ test_bench_files =
tb/vhdl/tb_dp_block_gen.vhd
tb/vhdl/tb_dp_block_gen_valid_arr.vhd
tb/vhdl/tb_dp_block_from_mm.vhd
tb/vhdl/tb_dp_block_from_mm_dc.vhd
tb/vhdl/tb_dp_bsn_align.vhd
tb/vhdl/tb_mms_dp_bsn_align.vhd
tb/vhdl/tb_dp_bsn_monitor.vhd
......
-- --------------------------------------------------------------------------
-- Copyright 2020
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
-- --------------------------------------------------------------------------
-- --------------------------------------------------------------------------
-- Author:
-- . Pieter Donker
-- Purpose:
-- . Read a block of data from memory mapped (MM) location and stream it as a block of data,
-- this is a dual-clock wrapper around dp_block_from_mm.vhd
-- Description:
-- . https://support.astron.nl/confluence/display/L2M/L5+SDPFW+Design+Document%3A+Subband+filterbank
-- --------------------------------------------------------------------------
LIBRARY IEEE,common_lib;
USE IEEE.std_logic_1164.ALL;
USE IEEE.numeric_std.ALL;
USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE work.dp_stream_pkg.ALL;
ENTITY dp_block_from_mm_dc IS
GENERIC (
g_data_size : NATURAL;
g_step_size : NATURAL;
g_nof_data : NATURAL
);
PORT (
dp_rst : IN STD_LOGIC;
dp_clk : IN STD_LOGIC;
mm_rst : IN STD_LOGIC;
mm_clk : IN STD_LOGIC;
start_pulse : IN STD_LOGIC;
start_address : IN NATURAL;
mm_done : OUT STD_LOGIC;
mm_mosi : OUT t_mem_mosi;
mm_miso : IN t_mem_miso;
out_sosi : OUT t_dp_sosi;
out_siso : IN t_dp_siso
);
END dp_block_from_mm_dc;
ARCHITECTURE rtl OF dp_block_from_mm_dc IS
CONSTANT c_fifo_size : NATURAL := 1024; -- 512 * 2 = 1024 words.
CONSTANT c_start_addr_w : NATURAL := 30;
SIGNAL fifo_sosi : t_dp_sosi := c_dp_sosi_rst;
SIGNAL fifo_siso : t_dp_siso;
SIGNAL mm_start_pulse : STD_LOGIC := '0';
SIGNAL mm_mm_done : STD_LOGIC := '0';
SIGNAL start_address_slv : STD_LOGIC_VECTOR(c_start_addr_w-1 DOWNTO 0) := (OTHERS => '0');
SIGNAL mm_start_address_slv : STD_LOGIC_VECTOR(c_start_addr_w-1 DOWNTO 0) := (OTHERS => '0');
SIGNAL mm_start_address : NATURAL := 0;
BEGIN
p_common_spulse_start_pulse : ENTITY common_lib.common_spulse
PORT MAP (
in_clk => dp_clk,
in_pulse => start_pulse,
out_clk => mm_clk,
out_pulse => mm_start_pulse
);
p_common_spulse_mm_done : ENTITY common_lib.common_spulse
PORT MAP (
in_clk => mm_clk,
in_pulse => mm_mm_done,
out_clk => dp_clk,
out_pulse => mm_done
);
start_address_slv <= TO_UVEC(start_address, c_start_addr_w);
mm_start_address <= TO_UINT(mm_start_address_slv);
p_common_async_slv_start_address : ENTITY common_lib.common_async_slv
PORT MAP (
clk => dp_clk,
din => start_address_slv,
dout => mm_start_address_slv
);
p_dp_fifo_fill_eop : ENTITY work.dp_fifo_fill_eop
GENERIC MAP (
g_use_dual_clock => TRUE,
g_data_w => c_word_w,
g_fifo_size => c_fifo_size
)
PORT MAP (
wr_rst => dp_rst,
wr_clk => dp_clk,
rd_rst => mm_rst,
rd_clk => mm_clk,
-- ST sink
snk_out => fifo_siso,
snk_in => fifo_sosi,
-- ST source
src_in => out_siso,
src_out => out_sosi
);
p_dp_block_from_mm : ENTITY work.dp_block_from_mm
GENERIC MAP (
g_data_size => g_data_size,
g_step_size => g_step_size,
g_nof_data => g_nof_data
)
PORT MAP (
clk => mm_clk,
rst => mm_rst,
start_pulse => mm_start_pulse,
start_address => mm_start_address,
mm_done => mm_mm_done,
mm_mosi => mm_mosi,
mm_miso => mm_miso,
out_sosi => fifo_sosi,
out_siso => fifo_siso
);
END rtl;
\ No newline at end of file
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