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Commit 00bc807d authored by Daniel van der Schuur's avatar Daniel van der Schuur
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-Added tr_10GbE_statistics

 . based on dp_statistics, just like eth_statistics.
parent d8e68990
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......@@ -8,6 +8,7 @@ synth_files =
src/vhdl/tr_10GbE.vhd
test_bench_files =
src/vhdl/tr_10GbE_statistics.vhd
tb/vhdl/tb_tr_10GbE.vhd
tb/vhdl/tb_tb_tr_10GbE.vhd
......
-------------------------------------------------------------------------------
--
-- Copyright (C) 2017
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
--
-------------------------------------------------------------------------------
-- Author:
-- . Daniel van der Schuur
-- Purpose:
-- . 1GbE wrapper for dp_statistics
LIBRARY IEEE, common_lib, work, technology_lib, dp_lib, tr_10GbE_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE dp_lib.dp_stream_pkg.ALL;
USE common_lib.common_field_pkg.ALL;
USE technology_lib.technology_select_pkg.ALL;
ENTITY tr_10GbE_statistics IS
GENERIC (
g_disable_failures : BOOLEAN := FALSE; --TRUE: report warnings instead of failures - does not stop sim.
g_runtime_nof_packets : NATURAL; -- Run the test bench for nof_packets before asserting tb_end
g_runtime_timeout : TIME; -- Report Failure if g_runtime_nof_packets is not reached before this time
g_check_nof_valid : BOOLEAN := FALSE; -- True enables valid count checking at tb_end. Reports Failure in case of mismatch.
g_check_nof_valid_ref : NATURAL := 0; -- . Specify reference valid count here
g_check_data_rate_mbps : BOOLEAN := FALSE; -- True enables checking of calculated data rate in Mbps
g_check_data_rate_mbps_ref : NATURAL := 0 -- . Specify reference data rate in Mbps here
);
PORT (
xaui_in : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
tb_end : OUT STD_LOGIC -- To be used to stop test-bench generated clocks
);
END tr_10GbE_statistics;
ARCHITECTURE str OF tr_10GbE_statistics IS
CONSTANT c_eth_clk_freq_khz : NATURAL := 156250;
CONSTANT c_eth_word_w : NATURAL := 64;
CONSTANT c_eth_clk_period : TIME := 6.4 ns;
CONSTANT c_cal_rec_clk_period : TIME := 25 ns; --40MHz
SIGNAL eth_clk : STD_LOGIC := '1'; --Start high to match sim model generated clock
SIGNAL eth_rst : STD_LOGIC;
SIGNAL cal_rec_clk : STD_LOGIC := '0';
SIGNAL tr_10GbE_src_out : t_dp_sosi;
SIGNAL i_tb_end : STD_LOGIC;
BEGIN
------------------------------------------------------------------------------
-- We're using the tb_end output locally
------------------------------------------------------------------------------
tb_end <= i_tb_end;
------------------------------------------------------------------------------
-- We're generating a reference clock locally, just like the sim model in
-- tr_10GbE
------------------------------------------------------------------------------
eth_clk <= NOT eth_clk OR i_tb_end AFTER c_eth_clk_period/2;
eth_rst <= '1', '0' AFTER c_eth_clk_period*8;
cal_rec_clk <= NOT cal_rec_clk OR i_tb_end AFTER c_cal_rec_clk_period/2;
------------------------------------------------------------------------------
-- Use tr_10GbE with internal simulation model as Ethernet receiver
------------------------------------------------------------------------------
u_tr_10GbE: ENTITY tr_10GbE_lib.tr_10GbE
GENERIC MAP(
g_sim => TRUE,
g_sim_level => 1,
g_nof_macs => 1,
g_use_mdio => FALSE
)
PORT MAP (
tr_ref_clk_156 => eth_clk,
tr_ref_rst_156 => eth_rst,
cal_rec_clk => cal_rec_clk,
mm_rst => '0',
mm_clk => '0',
dp_rst => eth_rst,
dp_clk => eth_clk,
xaui_rx_arr(0) => xaui_in,
src_out_arr(0) => tr_10GbE_src_out
);
------------------------------------------------------------------------------
-- dp_statistics
------------------------------------------------------------------------------
u_dp_statistics : ENTITY dp_lib.dp_statistics
GENERIC MAP (
g_disable_failures => g_disable_failures,
g_runtime_nof_packets => g_runtime_nof_packets,
g_runtime_timeout => g_runtime_timeout,
g_check_nof_valid => g_check_nof_valid,
g_check_nof_valid_ref => g_check_nof_valid_ref,
g_check_data_rate_mbps => g_check_data_rate_mbps,
g_check_data_rate_mbps_ref => g_check_data_rate_mbps_ref,
g_dp_clk_freq_khz => c_eth_clk_freq_khz,
g_dp_word_w => c_eth_word_w
)
PORT MAP (
dp_clk => eth_clk,
dp_rst => eth_rst,
snk_in => tr_10GbE_src_out,
tb_end => i_tb_end
);
END str;
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