hdllib.cfg

hdl_lib_name = st
hdl_library_clause_name = st_lib
hdl_lib_uses_synth = common common_mult technology mm dp diag
hdl_lib_uses_sim = 
hdl_lib_technology = 

synth_files = 
    src/vhdl/st_acc.vhd 
    src/vhdl/st_ctrl.vhd 
    src/vhdl/st_calc.vhd 
    src/vhdl/st_sst.vhd 
    src/vhdl/st_xsq.vhd 
    src/vhdl/st_xsq_arr.vhd 
#    src/vhdl/st_top.vhd 
    src/vhdl/st_histogram.vhd
    src/vhdl/st_histogram_reg.vhd
    src/vhdl/mms_st_histogram.vhd
    src/vhdl/st_histogram_8_april.vhd

    tb/vhdl/tb_st_pkg.vhd 
 
test_bench_files = 
    tb/vhdl/tb_st_acc.vhd 
    tb/vhdl/tb_st_calc.vhd 
    tb/vhdl/tb_mmf_st_sst.vhd
    tb/vhdl/tb_st_xsq.vhd
    tb/vhdl/tb_tb_st_xsq.vhd
    tb/vhdl/tb_st_histogram.vhd
    tb/vhdl/tb_mms_st_histogram.vhd
    tb/vhdl/tb_tb_st_histogram.vhd

regression_test_vhdl = 
    tb/vhdl/tb_st_acc.vhd 
    tb/vhdl/tb_tb_st_xsq.vhd
    #tb/vhdl/tb_st_calc.vhd   -- tb is not self checking yet


[modelsim_project_file]


[quartus_project_file]