hdllib.cfg

hdl_lib_name = io_ddr
hdl_library_clause_name = io_ddr_lib
hdl_lib_uses_synth = technology tech_ddr common dp diag diagnostics 
hdl_lib_uses_sim = 
hdl_lib_technology = 

synth_files =
    src/vhdl/io_ddr_driver_flush_ctrl.vhd
    src/vhdl/io_ddr_driver.vhd
    src/vhdl/io_ddr_cross_domain.vhd
    src/vhdl/io_ddr_reg.vhd
    src/vhdl/io_ddr.vhd
    src/vhdl/mms_io_ddr.vhd
    src/vhdl/mms_io_ddr_diag.vhd

test_bench_files = 
    tb/vhdl/tb_io_ddr.vhd
    tb/vhdl/tb_tb_io_ddr.vhd


regression_test_vhdl = 
    tb/vhdl/tb_tb_io_ddr.vhd

[modelsim_project_file]
modelsim_compile_ip_files =
    $RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl  # 4GB DDR3 model
    $RADIOHDL_WORK/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl               # 4GB DDR4 model
    $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/copy_hex_files.tcl          # Unb2b 4GB DDR4 driver
    $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/copy_hex_files.tcl          # Unb2b 8GB DDR4 driver
    $RADIOHDL_WORK/libraries/technology/ip_arria10_e2sg/ddr4_8g_1600/copy_hex_files.tcl          # Unb2c 8GB DDR4 driver


[quartus_project_file]