Bug 1198: longversion stukken teruggezet om de 10 paginas te vullen

doc/papers/2010/SPM/spm.tex

@@ -652,7 +652,7 @@ prefetching, write combining, and pipelining. The software techniques can be div
 further into compiler optimizations and algorithmic improvements.
   The distinction between hardware and
 software is not entirely black and white. Data prefetching, for
-instance, can be done both in harware and software.  Another good
+instance, can be done both in hardware and software.  Another good
 example is the explicit cache of the \mbox{Cell/B.E.} processor. This is
 an architecture where the programmer handles the cache
 replacement policies instead of the hardware.
@@ -720,7 +720,7 @@ their complex memory systems.
 
 % OpenCL helpt misschien, door runtime compilation.
 
-\subsubsection{Appying the techniques}
+\subsubsection{Applying the techniques}
 
 So, the second step of mapping a signal-processing algorithm to a many-core architecture
 is optimizing the memory behavior. We can split this step into two phases: