Task #5866: add test version in svn

MAC/APL/PIC/RSP_Driver/src/Cache.cc

@@ -40,6 +40,84 @@ using namespace RSP;
 using namespace RSP_Protocol;
 using namespace RTC;
 
+// default settings
+// sdo_ss=295:330,331:366,367:402,403:438
+blitz::Array<uint16, 2> str2blitz(const char* str, int max)
+{
+    string inputstring(str);
+    char* start  = (char*)inputstring.c_str();
+    char* end  = 0;
+    bool  range  = false;
+    long  prevval = 0;
+
+    blitz::Array<uint16, 2> ss(4,36); // ss = subband select
+    int bank_nr = 0;
+    int sb_nr = 0;
+    long i;
+
+    ss = 0;
+    while (start) {
+        long val = strtol(start, &end, 10); // read decimal numbers
+        start = (end ? (*end ? end + 1 : 0) : 0); // advance
+        if (val >= max || val < 0) {
+            LOG_WARN(formatString("Error: value %ld out of range",val));
+            ss = 0;
+            return ss;
+        }
+        LOG_INFO_STR("val=" << val << "  prevval=" << prevval);
+        if (end) {
+            switch (*end) {
+                case ',':
+                case 0: {
+                    if (range) {
+                        if (0 == prevval && 0 == val) {
+                            val = max - 1;
+                        }
+                        if (val < prevval) {
+                            LOG_WARN("Error: invalid range specification");
+                            ss = 0;
+                            return ss;
+                        }
+
+                        for (i = prevval; i <= val; i++) {
+                            //LOG_INFO(formatString("add value %ld to ss(%d,%d)", i, bank_nr, sb_nr));
+                            ss(bank_nr, sb_nr) = (uint16)i;
+                            sb_nr++;
+                            if (sb_nr >= 36) {
+                                bank_nr++;
+                                sb_nr = 0;
+                            }
+                        }
+                    }
+                    else {
+                        ss(bank_nr, sb_nr) = (uint16)val;
+                        sb_nr++;
+                        if (sb_nr >= 36) {
+                            bank_nr++;
+                            sb_nr = 0;
+                        }
+                    }
+                    range=false;
+                } break;
+
+                case ':': {
+                    range=true;
+                } break;
+
+                default: {
+                    LOG_WARN(formatString("Error: invalid character %c",*end));
+                    ss = 0;
+                    return ss;
+                } break;
+            } // switch
+        } // if (end)
+        prevval = val;
+    } // while
+
+    return (ss);
+}
+
+
 /**
  * Instance pointer for the Cache singleton class.
  */
@@ -292,6 +370,9 @@ void CacheBuffer::reset(void)
     m_bypasssettings().resize(StationSettings::instance()->nrBlps());
     BypassSettings::Control control;
     m_bypasssettings() = control;
+    for (int blp_nr = 0; blp_nr < StationSettings::instance()->nrBlps(); blp_nr += 4) {
+        m_bypasssettings()(blp_nr).setSDO(1);
+    }
 
     // clear rawdatablock
     itsRawDataBlock.address = 0;
@@ -328,18 +409,35 @@ void CacheBuffer::reset(void)
     bitmodeinfo.bm_max = 0;
     itsBitModeInfo() = bitmodeinfo;
 
-    // SDOMode
+    // SDO default Mode selection
+    int sdo_mode = 0;
+    int bits_per_sample = GET_CONFIG("RSPDriver.SDO_MODE", i);
+    if      (bits_per_sample == 8) { sdo_mode = 1; }
+    else if (bits_per_sample == 5) { sdo_mode = 2; }
+    else if (bits_per_sample == 4) { sdo_mode = 3; }
+
     itsSDOModeInfo().resize(StationSettings::instance()->nrRspBoards());
     RSRSDOMode sdomodeinfo;
-	sdomodeinfo.bm_select = 0;
-	sdomodeinfo.bm_max = 0;
+    sdomodeinfo.bm_select = sdo_mode;
+    sdomodeinfo.bm_max = 3;
     itsSDOModeInfo() = sdomodeinfo;
 
+    // SDO default subband selection
     itsSDOSelection.subbands().resize(StationSettings::instance()->nrRcus(),
                                      (MAX_BITS_PER_SAMPLE/MIN_BITS_PER_SAMPLE),
                                       MEPHeader::N_SDO_SUBBANDS);
-	itsSDOSelection.subbands() = 0;
-	//TODO: itsSDOSelection() = 0;
+    char select_str[64];
+    blitz::Array<uint16, 2> select(4,36);
+    strncpy(select_str, GET_CONFIG_STRING("RSPDriver.SDO_SS"), 64);
+    select = str2blitz(select_str, 512);
+    for (int rcu = 0; rcu < StationSettings::instance()->nrRcus(); rcu++) {
+        for (int bank = 0; bank < (MAX_BITS_PER_SAMPLE / MIN_BITS_PER_SAMPLE); bank++) {
+            itsSDOSelection.subbands()(rcu, bank, Range::all()) = 0;
+            for (int sb = 0; sb < 36; sb++) {
+                itsSDOSelection.subbands()(rcu, bank, sb) = (select(bank, sb) * 2) + (rcu % 2);
+            } // for each subband
+        } // for each bank
+    }
 }
 
 
@@ -379,7 +477,7 @@ Cache::Cache() : m_front(0), m_back(0)
                     StationSettings::instance()->nrRcus());
 
     // start by writing the correct clock setting
-	Sequencer::getInstance().startSequence(Sequencer::SEQ_SETCLOCK);
+    Sequencer::getInstance().startSequence(Sequencer::SEQ_STARTUP);
 }
 
 Cache::~Cache()
@@ -427,3 +525,4 @@ void Cache::resetI2Cuser()
                                      ((busUser == RCU_R) ? "RCU_R" : "RCU_W"))));
 
 }
+

MAC/APL/PIC/RSP_Driver/src/Cache.h

@@ -200,6 +200,7 @@ private:
 	// Direct construction not allowed.
 	Cache();
     
+
 	// Keep register update state.
 	AllRegisterState m_allstate; // communication status of all register
 

MAC/APL/PIC/RSP_Driver/src/RCUProtocolWrite.cc

@@ -46,6 +46,11 @@ namespace LOFAR {
     const int RCUProtocolWrite::RESULT_READ_SIZE;
 
     uint8 RCUProtocolWrite::i2c_protocol_write[] = {
+        0x12, // PROTOCOL_C_WAIT
+        0x00, // <<< replace with data, wait byte 0 >>>
+        0x00, // <<< replace with data, wait byte 1 >>>
+        0x00, // <<< replace with data, wait byte 2 >>>
+        0x00, // <<< replace with data, wait byte 3 >>>
         0x0F, // PROTOCOL_C_SEND_BLOCK
         0x01, // I2C address for RCU
         0x03, // size
@@ -66,6 +71,7 @@ namespace LOFAR {
     };
 
     uint8 RCUProtocolWrite::i2c_result_write[] = {
+        0x00, // PROTOCOL_C_WAIT OK
         0x00, // PROTOCOL_C_SEND_BLOCK OK
         0xAA, // <<< replace with expected data >>>
         0xAA, // <<< replace with expected data >>>
@@ -137,8 +143,31 @@ void RCUProtocolWrite::sendrequest()
             if (writeCmdRequested) {
                 // reverse and copy control bytes into i2c_protocol_write
                 RCUSettings::Control& rcucontrol = Cache::getInstance().getBack().getRCUSettings()()((global_rcu));
+
+                // add waits while turning on hbas to reduce power peaks.
+                // if RCU enable changed or rcumode changed
+                // if rcumode > 0
+                if ((rcucontrol.isModeModified()) && (rcucontrol.getMode() > 0)) {
+                    // wait between two RCUs is set to maximum, so that an international station
+                    // running on 160MHz clock can finisch the job in 1 second.
+                    uint32 delay = 0; // in clock ticks, 2000000 = 8msec on 200MHz, 10msec on 160MHz
+                    // add extra wait for each board only for first rcu
+                    /*
+                    if ((global_rcu % 8) == 0) {
+                        delay = (4000000 * (global_rcu / 2)); // power up one power RCU at a time.
+                        //delay = (2000000 * ((global_rcu % 32) / 2)); // per crate, 3 or 6 power RCUs at a time.
+                    }
+                    else  if ((global_rcu % 2) == 0) {
+                        delay = 16000000 * (global_rcu / 2);
+                    }*/
+                    delay = 4000000 * (global_rcu / 2);
+                    uint32 wait = htonl(delay);
+                    LOG_INFO_STR(formatString("RCU I2C wait rcu %d = %f sec (delay=%04x, wait=%04x)", global_rcu, delay * (1./200e6), delay, wait));
+                    memcpy(i2c_protocol_write+1, &wait, 4);
+                }
+
                 uint32 control = htonl(rcucontrol.getRaw());
-				memcpy(i2c_protocol_write+3, &control, 3);
+                memcpy(i2c_protocol_write+8, &control, 3);
 
                 EPARcuProtocolEvent rcuprotocol;
                 rcuprotocol.hdr.set(hdr, 1 << (getCurrentIndex() / (N_POL * N_WRITES)), MEPHeader::WRITE, sizeof(i2c_protocol_write));

MAC/APL/PIC/RSP_Driver/src/RCUProtocolWrite.h

@@ -55,9 +55,9 @@ private:
 
     friend class RCUResultRead;
 
-	static const int PROTOCOL_WRITE_SIZE = 10;
+    static const int PROTOCOL_WRITE_SIZE = 15;
     static const int PROTOCOL_READ_SIZE  = 4;
-	static const int RESULT_WRITE_SIZE	 = 6; 
+    static const int RESULT_WRITE_SIZE   = 7;
     static const int RESULT_READ_SIZE    = 5;
 
     // construct i2c sequence

MAC/APL/PIC/RSP_Driver/src/RCUWrite.cc

@@ -71,7 +71,7 @@ void RCUWrite::sendrequest()
   rcusettings.hdr.set(MEPHeader::RCU_SETTINGS_HDR, 1 << getCurrentIndex()); // also sets payload_length
   rcusettings.ap = EPA_Protocol::RCUHandler();
   rcusettings.ap.input_delay_x = x.getDelay();
-  rcusettings.ap.enable_x      = y.getEnable();
+  rcusettings.ap.enable_x      = x.getEnable();
   rcusettings.ap.input_delay_y = y.getDelay();
   rcusettings.ap.enable_y      = y.getEnable();
 

MAC/APL/PIC/RSP_Driver/src/SDOModeWrite.cc

@@ -43,7 +43,7 @@ SDOModeWrite::SDOModeWrite(GCFPortInterface& board_port, int board_id)
   : SyncAction(board_port, board_id, 1)
 {
   memset(&itsHdr, 0, sizeof(MEPHeader));
-  doAtInit();
+  //doAtInit();
 }
 
 SDOModeWrite::~SDOModeWrite()

MAC/APL/PIC/RSP_Driver/src/SDOWrite.cc

@@ -45,7 +45,7 @@ SDOWrite::SDOWrite(GCFPortInterface& board_port, int board_id)
     
 {
 	memset(&m_hdr, 0, sizeof(MEPHeader));
-    doAtInit();
+    //doAtInit();
 }
 
 SDOWrite::~SDOWrite()

MAC/APL/PIC/RSP_Driver/src/Sequencer.h

@@ -40,9 +40,9 @@ class Sequencer : public GCFFsm
 public:
     typedef enum {
       SEQ_NONE = 0,
-	  SEQ_SETCLOCK, // done at initialization
+      SEQ_STARTUP,  // done at initialization
+      SEQ_SETCLOCK, // if clock switch
       SEQ_RSPCLEAR,
-	  SEQ_SDOPRESET,
     } Sequence;
     //
     // Constructor/destructor
@@ -68,20 +68,23 @@ public:
     // The states of the statemachine.
     //
     GCFEvent::TResult idle_state        (GCFEvent& event, GCFPortInterface& port);
+    GCFEvent::TResult disableClock_state(GCFEvent& event, GCFPortInterface& port);
+    GCFEvent::TResult readDisabledClock_state(GCFEvent& event, GCFPortInterface& port);
+    GCFEvent::TResult writePLL_state    (GCFEvent& event, GCFPortInterface& port);
+    GCFEvent::TResult readPLL_state     (GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult RSUpreclear_state (GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult clearClock_state  (GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult writeClock_state  (GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult readClock_state   (GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult RCUdisable_state  (GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult RSUclear_state    (GCFEvent& event, GCFPortInterface& port);
+    GCFEvent::TResult setAll_state      (GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult setBlocksync_state(GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult RADwrite_state    (GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult PPSsync_state     (GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult RCUenable_state   (GCFEvent& event, GCFPortInterface& port);
     GCFEvent::TResult CDOenable_state   (GCFEvent& event, GCFPortInterface& port);
-	GCFEvent::TResult SDObitmode_state  (GCFEvent& event, GCFPortInterface& port);
-	GCFEvent::TResult SDOselect_state   (GCFEvent& event, GCFPortInterface& port);
-	GCFEvent::TResult SDOenable_state   (GCFEvent& event, GCFPortInterface& port);
+    GCFEvent::TResult setSDOwrite_state (GCFEvent& event, GCFPortInterface& port);
     /*@}*/
 
 private:
@@ -97,6 +100,7 @@ private:
 
     bool        itsIdle;        // In idle-state or not
     Sequence    itsCurSeq;      // currently executing sequence
+    int         itsClockRequest;// requested clock freq
 
     int         itsTimer;       // timer used to delay some actions
     bool        itsFinalState;  // final state of sequence (used by rcudisable_state)

MAC/APL/PIC/RSP_Driver/src/SetRCUCmd.cc

@@ -85,6 +85,15 @@ void SetRCUCmd::apply(CacheBuffer& cache, bool setModFlag)
 
             // Apply delays and attenuation when mode was changed.
             if (newMode) {
+                // if mode changed be sure RCU is enabled, is needed to reduce poweron current on hba's
+                /*
+                if (mode > 0) {
+                    cache.getRCUSettings()()(cache_rcu).setEnable(1);
+                }
+                else {
+                    cache.getRCUSettings()()(cache_rcu).setEnable(0);
+                }
+                */
                 cache.getRCUSettings()()(cache_rcu).setDelay(
                             (uint8) ((delayStep/2.0 + cableSettings->getDelay(cache_rcu, mode)) / delayStep));
                 cache.getRCUSettings()()(cache_rcu).setAttenuation(

MAC/APL/PIC/RSP_Driver/src/StatusRead.cc

@@ -42,6 +42,9 @@ StatusRead::StatusRead(GCFPortInterface& board_port, int board_id)
   : SyncAction(board_port, board_id, 1)
 {
   memset(&m_hdr, 0, sizeof(MEPHeader));
+
+  // this action should be performed at initialisation
+  //doAtInit();
 }
 
 StatusRead::~StatusRead()
@@ -110,16 +113,19 @@ GCFEvent::TResult StatusRead::handleack(GCFEvent& event, GCFPortInterface& /*por
   // if cache value different from hardware reported value, make equal
   switch (ack.board.rsp.bp_clock) {
 
+  case 125:
   case 160:
   case 200:
     if (0 == getBoardId()) {
       if (0 == Cache::getInstance().getBack().getClock()) {
+
 #if 0
     LOG_INFO_STR(formatString("Receiving initial clock setting from RSP board: %d MHz. Adjusting cache value.",
                   ack.board.rsp.bp_clock));
     Cache::getInstance().getFront().getClock() = ack.board.rsp.bp_clock;
     Cache::getInstance().getBack().getClock()  = ack.board.rsp.bp_clock;
 #endif
+
       } else if (ack.board.rsp.bp_clock != Cache::getInstance().getBack().getClock()) {
         LOG_WARN_STR(formatString("Reported clock (%d MHz) is different from cache settings (%d MHz) on RSP board %d",
                   ack.board.rsp.bp_clock, Cache::getInstance().getBack().getClock(), getBoardId()));

MAC/APL/PIC/RSP_Driver/src/TDSProtocolWrite.cc

@@ -46,19 +46,29 @@ using namespace EPA_Protocol;
 namespace LOFAR {
   namespace RSP {
 
-    static uint8 tds_160MHz[
-#ifndef DISABLE_PROGRAMPLL
+    static uint8 tds_pll[
                     TDS_INIT_SIZE
-			    + TDS_PROGRAMPLLS_SIZE
-#endif
-			    + TDS_160MHZ_SIZE
-			    + TDS_C_END_SIZE] = {
+                    + TDS_PROGRAMPLLS_SIZE] = {
 
-			      // switch to 160MHz to backplane (using 10MHz reference at the front)
-#ifndef DISABLE_PROGRAMPLL
+                        // program pll
                         TDS_INIT,
                         TDS_PROGRAMPLLS,
-#endif
+                    };
+
+    uint8 tds_pll_result[
+                    TDS_INIT_RESULT_SIZE
+                    + TDS_PROGRAMPLLS_RESULT_SIZE] = {
+
+                        TDS_INIT_RESULT,
+                        TDS_PROGRAMPLLS_RESULT,
+                    };
+
+
+    static uint8 tds_160MHz[
+                    TDS_160MHZ_SIZE
+                    + TDS_C_END_SIZE] = {
+
+                  // switch to 160MHz to backplane (using 10MHz reference at the front)
                   TDS_160MHZ,
                   TDS_C_END,
 
@@ -66,52 +76,28 @@ namespace LOFAR {
 
 
     uint8 tds_160MHz_result[
-#ifndef DISABLE_PROGRAMPLL
-			      TDS_INIT_RESULT_SIZE
-			    + TDS_PROGRAMPLLS_RESULT_SIZE
-#endif
-			    + TDS_160MHZ_RESULT_SIZE
+                  TDS_160MHZ_RESULT_SIZE
                 + TDS_C_END_RESULT_SIZE] = {
 
-#ifndef DISABLE_PROGRAMPLL
-			      TDS_INIT_RESULT,
-			      TDS_PROGRAMPLLS_RESULT,
-#endif
                   TDS_160MHZ_RESULT,
                   TDS_C_END_RESULT,
 
                 };
 
     static uint8 tds_200MHz[
-#ifndef DISABLE_PROGRAMPLL
-			      TDS_INIT_SIZE
-			    + TDS_PROGRAMPLLS_SIZE
-#endif
-			    + TDS_200MHZ_SIZE
+                  TDS_200MHZ_SIZE
                 + TDS_C_END_SIZE] = {
 
                   // switch to 200MHz to backplane (using 10MHz reference at the front)
-#ifndef DISABLE_PROGRAMPLL
-			      TDS_INIT,
-			      TDS_PROGRAMPLLS,
-#endif
                   TDS_200MHZ,
                   TDS_C_END,
 
                 };
 
     uint8 tds_200MHz_result[
-#ifndef DISABLE_PROGRAMPLL
-			      TDS_INIT_RESULT_SIZE
-			    + TDS_PROGRAMPLLS_RESULT_SIZE
-#endif
                 + TDS_200MHZ_RESULT_SIZE
                 + TDS_C_END_RESULT_SIZE] = {
 
-#ifndef DISABLE_PROGRAMPLL
-			      TDS_INIT_RESULT,
-			      TDS_PROGRAMPLLS_RESULT,
-#endif
                   TDS_200MHZ_RESULT,
                   TDS_C_END_RESULT,
 
@@ -180,6 +166,11 @@ void TDSProtocolWrite::sendrequest()
 
   size_t size = 0;
 
+  // select clock
+  // 160 or 200 [MHz] (extern td clock)
+  // 125        [MHz] (intern board clock)
+  // 0          programm pll
+
   switch (Cache::getInstance().getBack().getClock()) {
   case 160:
     buf = (char*)tds_160MHz;
@@ -201,7 +192,7 @@ void TDSProtocolWrite::sendrequest()
     tdsprotocol.hdr.set(MEPHeader::TDS_PROTOCOL_HDR, MEPHeader::DST_RSP, MEPHeader::WRITE, size, m_offset);
     break;
 
-  default:
+  case 125:
     buf = (char*)tds_off;
     if (0 == getCurrentIndex()) {
       m_remaining = sizeof(tds_off);
@@ -210,6 +201,16 @@ void TDSProtocolWrite::sendrequest()
     size = MIN(TDS_CHUNK_SIZE, m_remaining);
     tdsprotocol.hdr.set(MEPHeader::TDS_PROTOCOL_HDR, MEPHeader::DST_RSP, MEPHeader::WRITE, size, m_offset);
     break;
+
+  default:
+    buf = (char*)tds_pll;
+    if (0 == getCurrentIndex()) {
+      m_remaining = sizeof(tds_pll);
+      m_offset    = 0;
+    }
+    size = MIN(TDS_CHUNK_SIZE, m_remaining);
+    tdsprotocol.hdr.set(MEPHeader::TDS_PROTOCOL_HDR, MEPHeader::DST_RSP, MEPHeader::WRITE, size, m_offset);
+    break;
   }
 
   tdsprotocol.protocol.setBuffer((char*)buf + m_offset, size);

MAC/APL/PIC/RSP_Driver/src/TDSi2cdefs.h

@@ -404,20 +404,14 @@
 namespace LOFAR {
   namespace RSP {
 
-	extern uint8 tds_160MHz_result[
-#ifndef DISABLE_PROGRAMPLL
-					  TDS_INIT_RESULT_SIZE
-					+ TDS_PROGRAMPLLS_RESULT_SIZE
-#endif
-					+ TDS_160MHZ_RESULT_SIZE
+
+    extern uint8 tds_pll_result[ TDS_INIT_RESULT_SIZE
+			                   + TDS_PROGRAMPLLS_RESULT_SIZE ];
+                    
+	extern uint8 tds_160MHz_result[ TDS_160MHZ_RESULT_SIZE
 					              + TDS_C_END_RESULT_SIZE ];
 
-	extern uint8 tds_200MHz_result[ 
-#ifndef DISABLE_PROGRAMPLL
-					  TDS_INIT_RESULT_SIZE
-					+ TDS_PROGRAMPLLS_RESULT_SIZE
-#endif
-					+ TDS_200MHZ_RESULT_SIZE
+	extern uint8 tds_200MHz_result[ TDS_200MHZ_RESULT_SIZE
 					              + TDS_C_END_RESULT_SIZE ];
 
 	extern uint8 tds_off_result[ TDS_VCXO_OFF_RESULT_SIZE